參數(shù)資料
型號: ICS87931BYIT
英文描述: LOW SKEW, 1-TO-6 LVCMOS/LVTTL CLOCK MULTIPLIER/ZERO DELAY BUFFER
中文描述: 低偏移,1到6的LVCMOS / LVTTL時(shí)鐘倍頻/零延遲緩沖器
文件頁數(shù): 1/14頁
文件大小: 166K
代理商: ICS87931BYIT
87931BYI
www.icst.com/products/hiperclocks.html
REV. A JUNE 23, 2003
ICS87931I
L
OW
S
KEW
, 1-
TO
-6
LVCMOS/LVTTL C
LOCK
M
ULTIPLIER
/Z
ERO
D
ELAY
B
UFFER
G
ENERAL
D
ESCRIPTION
The ICS87931I is a low voltage, low skew
LVCMOS/LVTTL Clock Multiplier/Zero Delay
Buffer and a member of the
HiPerClockS family
of High Performance Clock Solutions from ICS.
With output frequencies up to 150MHz, the
ICS87931I is targeted for high performance clock applications.
Along with a fully integrated PLL, the ICS87931I contains fre-
quency configurable outputs and an external feedback input for
regenerating clocks with “zero delay”.
Selectable clock inputs, CLK1 and differential CLK0, nCLK0
support redundant clock applications. The CLK_SEL input de-
termines which reference clock is used. The output divider val-
ues of Bank A, B and C are controlled by the DIV_SELA,
DIV_SELB and DIV_SELC, respectively.
For test and system debug purposes, the PLL_SEL input al-
lows the PLL to be bypassed. When LOW, the nMR input re-
sets the internal dividers and forces the outputs to the high im-
pedance state.
The effective fanout of the ICS87931I can be increased to 12
by utilizing the ability of each output to drive two series termi-
nated transmission lines.
F
EATURES
Fully integrated PLL
6 LVCMOS/LVTTL outputs, 7
typical output impedance
Selectable differential CLK0, nCLK0 or LVCMOS/LVTTL clock
for redundant clock applications
Maximum output frequency: 150MHz
VCO range: 220MHz to 480MHz
External feedback for “zero delay” clock regeneration
Output skew, Same Frequency: 300ps (maximum)
Output skew, Different Frequency: 400ps (maximum)
Cycle-to-cycle jitter: 100ps (maximum)
3.3V supply voltage
-40°C to 85°C ambient operating temperature
Pin compatible with MPC931
HiPerClockS
,&6
P
IN
A
SSIGNMENT
32 31 30 29 28 27 26 25
9 10 11 12 13 14 15 16
1
2
3
4
5
6
7
8
24
23
22
21
20
19
18
17
GND
QB0
QB1
V
DDO
EXTFB_SEL
CLK_SEL
PLL_SEL
nc
nc
V
DDA
POWER_DN
CLK1
nMR
CLK0
nCLK0
GND
G
Q
Q
V
D
E
C
C
n
G
Q
Q
V
D
D
D
D
n
ICS87931I
32-Lead LQFP
7mm x 7mm x 1.4mm
package body
Y package
Top View
POWER_DN
PLL_SEL
CLK_SEL
CLK1
CLK0
nCLK0
EXTFB_SEL
EXT_FB
DIV_SELA
DIV_SELB
CLK_EN0
CLK_EN1
DIV_SELC
nMR
QA0
QA1
QB0
QB1
QC0
QC1
Pullup
Pulldown
Pullup
Pullup
Pullup
Pullup
Pullup
Pullup
Pulldown
Pullup
Pulldown
Pulldown
Pulldown
None
0
1
0
1
1
0
1
0
POWER-ON RESET
PHASE
DETECTOR
LPF
DISABLE
LOGIC
VCO
÷8
÷4/÷6
÷2/÷4
÷2/÷4
÷2
B
LOCK
D
IAGRAM
相關(guān)PDF資料
PDF描述
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ICS87973DYI-147 LOW SKEW, 1-TO-12 LVCMOS / LVTTL CLOCK MULTIPLIER/ZERO DELAY BUFFER
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