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參數(shù)資料
| 型號： | ICS85411AM |
| 英文描述： | Low Skew, 1-TO-2 DIFFERENTIAL-TO-LVDS FANOUT BUFFER |
| 中文描述： | 低斜，1至2差分至LVDS扇出緩沖器 |
| 文件頁數(shù)： | 12/13頁 |
| 文件大?。?/td> | 189K |
| 代理商： | ICS85411AM |
85411AM
www.icst.com/products/hiperclocks.html
REV. B JUNE 16, 2004
8
Integrated
Circuit
Systems, Inc.
ICS85411
LOW SKEW, 1-TO-2
DIFFERENTIAL-TO-LVDS FANOUT BUFFER
APPLICATION INFORMATION
Figure 1 shows how the differential input can be wired to accept
single ended levels. The reference voltage V_REF = V
DD/2 is
generated by the bias resistors R1, R2 and C1. This bias circuit
should be located as close as possible to the input pin. The ratio
FIGURE 1. SINGLE ENDED SIGNAL DRIVING DIFFERENTIAL INPUT
WIRING THE DIFFERENTIAL INPUT TO ACCEPT SINGLE ENDED LEVELS
of R1 and R2 might need to be adjusted to position the V_REF in
the center of the input voltage swing. For example, if the input
clock swing is only 2.5V and V
DD = 3.3V, V_REF should be 1.25V
and R2/R1 = 0.609.
V_REF
R1
1K
C1
0.1u
R2
1K
Single Ended Clock Input
CLK
nCLK
VDD
LVDS DRIVER TERMINATION
A general LVDS interface is shown in
Figure 2. In a 100
differential transmission line environment, LVDS drivers
require a matched load termination of 100
across near the
receiver input. For a multiple LVDS outputs buffer, if only
partial outputs are used, it is recommended to terminate
the un-used outputs.
FIGURE 2. TYPICAL LVDS DRIVER TERMINATION
R1
100
3.3V
100 Ohm Differential Transmission Line
3.3V
+
-
LVDS
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