參數(shù)資料
型號(hào): ICS85408BGILF
廠商: IDT, Integrated Device Technology Inc
文件頁(yè)數(shù): 13/16頁(yè)
文件大?。?/td> 0K
描述: IC CLK BUFFER 1:8 700MHZ 24TSSOP
標(biāo)準(zhǔn)包裝: 62
系列: HiPerClockS™
類型: 扇出緩沖器(分配)
電路數(shù): 1
比率 - 輸入:輸出: 1:8
差分 - 輸入:輸出: 是/是
輸入: HCSL,LVDS,LVHSTL,LVPECL,SSTL
輸出: LVDS
頻率 - 最大: 700MHz
電源電壓: 3.135 V ~ 3.465 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 24-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 24-TSSOP
包裝: 管件
其它名稱: 85408BGILF
ICS85408BGILF-ND
ICS85408I Datasheet
LOW SKEW, 1-TO-8, DIFFERENTIAL-TO-LVDS CLOCK DISTRIBUTION CHIP
ICS85408BGI REVISION B JULY 2, 2009
6
2009 Integrated Device Technology, Inc.
Additive Phase Jitter
The spectral purity in a band at a specific offset from the fundamental
compared to the power of the fundamental is called the dBc Phase
Noise. This value is normally expressed using a Phase noise plot
and is most often the specified plot in many applications. Phase noise
is defined as the ratio of the noise power present in a 1Hz band at a
specified offset from the fundamental frequency to the power value of
the fundamental. This ratio is expressed in decibels (dBm) or a ratio
of the power in the 1Hz band to the power in the fundamental. When
the required offset is specified, the phase noise is called a dBc value,
which simply means dBm at a specified offset from the fundamental.
By investigating jitter in the frequency domain, we get a better
understanding of its effects on the desired application over the entire
time record of the signal. It is mathematically possible to calculate an
expected bit error rate given a phase noise plot.
As with most timing specifications, phase noise measurements has
issues relating to the limitations of the equipment. Often the noise
floor of the equipment is higher than the noise floor of the device. This
is illustrated above. The device meets the noise floor of what is
shown, but can actually be lower. The phase noise is dependent on
the input source and measurement equipment.
SSB
Phas
e
Noise
dBc/Hz
Offset from Carrier Frequency (Hz)
Additive Phase Jitter @156.25MHz
12kHz – 20MHz = 167fs (typical)
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