參數(shù)資料
型號(hào): ICS85356AGIT
英文描述: 2:1, DIFFERENTIAL-TO-3.3V DUAL LVPECL / ECL CLOCK MULTIPLEXER
中文描述: 2:1,差分至3.3V雙的LVPECL / ECL時(shí)鐘復(fù)用器
文件頁數(shù): 8/14頁
文件大?。?/td> 238K
代理商: ICS85356AGIT
85356AMI
www.icst.com/products/hiperclocks.html
REV. A OCTOBER 7, 2004
8
Integrated
Circuit
Systems, Inc.
ICS85356I
2:1, D
IFFERENTIAL
-
TO
-3.3V
D
UAL
LVPECL / ECL C
LOCK
M
ULTIPLEXER
P
OWER
C
ONSIDERATIONS
This section provides information on power dissipation and junction temperature for the ICS85356I.
Equations and example calculations are also provided.
1. Power Dissipation.
The total power dissipation for the ICS85356I is the sum of the core power plus the power dissipated in the load(s).
The following is the power dissipation for V
CC
= 3.3V + 0.3V = 3.6V, which gives worst case results.
NOTE:
Please refer to Section 3 for details on calculating power dissipated in the load.
Power (core)
MAX
= V
CC_MAX
* I
EE_MAX
= 3.6V * 40mA =
144mW
Power (outputs)
MAX
=
30.2mW/Loaded Output pair
If all outputs are loaded, the total power is 2 * 30.2mW =
60.4mW
Total Power
_MAX
(3.6V, with all outputs switching) =
144mW + 60.4mW =
204.4mW
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the
device. The maximum recommended junction temperature for HiPerClockS
TM
devices is 125°C.
The equation for Tj is as follows: Tj =
θ
JA
* Pd_total + T
A
Tj = Junction Temperature
θ
JA
= Junction-to-Ambient Thermal Resistance
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
T
A
= Ambient Temperature
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance
θ
must be used
moderate air flow of 200 linear feet per minute and a multi-layer board, the appropriate value is 39.7°C/W per Table 6A below.
. Assuming a
Therefore, Tj for an ambient temperature of 85°C with all outputs switching is:
85°C + 0.204W * 39.7°C/W = 93.1°C. This is well below the limit of 125°C
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow,
and the type of board (single layer or multi-layer).
θ
JA
by Velocity (Linear Feet per Minute)
Table 6A. Thermal Resistance
θ
JA
for 20-pin SOIC, Forced Convection
0
200
500
Single-Layer PCB, JEDEC Standard Test Boards
Multi-Layer PCB, JEDEC Standard Test Boards
NOTE:
Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.
83.2°C/W
46.2°C/W
65.7°C/W
39.7°C/W
57.5°C/W
36.8°C/W
θ
JA
by Velocity (Linear Feet per Minute)
Table 6B. Thermal Resistance
θ
JA
for 20-pin TSSOP, Forced Convection
0
200
500
Single-Layer PCB, JEDEC Standard Test Boards
Multi-Layer PCB, JEDEC Standard Test Boards
NOTE:
Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.
114.5°C/W
73.2°C/W
98.0°C/W
66.6°C/W
88.0°C/W
63.5°C/W
相關(guān)PDF資料
PDF描述
ICS85356AMIT 2:1, DIFFERENTIAL-TO-3.3V DUAL LVPECL / ECL CLOCK MULTIPLEXER
ICS85357-01 4:1 OR 2:1 DIFFERENTIAL-TO-3.3V LVPECL / ECL CLOCK MULTIPLEXER
ICS85357-11 4:1 OR 2:1, CRYSTAL OSCILLATOR-TO-3.3V LVPECL / ECL MULTIPLEXER
ICS85357AG-01 4:1 OR 2:1 DIFFERENTIAL-TO-3.3V LVPECL / ECL CLOCK MULTIPLEXER
ICS85357AG-01T 4:1 OR 2:1 DIFFERENTIAL-TO-3.3V LVPECL / ECL CLOCK MULTIPLEXER
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