參數(shù)資料
型號(hào)： ICS853031AYLFT
元件分類： 圓形連接器
英文描述： Circular Connector; No. of Contacts:1; Series:; Body Material:Aluminum Alloy; Connecting Termination:Solder; Connector Shell Size:18; Circular Contact Gender:Socket; Circular Shell Style:Straight Plug; Insert Arrangement:18-16 RoHS Compliant: No
中文描述： 低偏移，1到9 DIFFERENTIAL-TO-2.5V/3.3V的LVPECL / ECL扇出緩沖器
文件頁(yè)數(shù)： 9/19頁(yè)
文件大?。?/td> 241K
代理商： ICS853031AYLFT
853031AY
www.icst.com/products/hiperclocks.html
REV. B SEPTEMBER 16, 2004
9
Integrated
Circuit
Systems, Inc.
ICS853031
L
OW
S
KEW
, 1-
TO
-9
D
IFFERENTIAL
-
TO
-2.5V/3.3V LVPECL/ECL F
ANOUT
B
UFFER
A
PPLICATION
I
NFORMATION
Figure 2shows how the differential input can be wired to accept
single ended levels. The reference voltage V_REF ~ V
/2 is
generated by the bias resistors R1, R2 and C1. This bias circuit
should be located as close as possible to the input pin. The ratio
The clock layout topology shown below is a typical termina-
tion for LVPECL outputs. The two different layouts mentioned
are recommended only as guidelines.
FOUT and nFOUT are low impedance follower outputs that
generate ECL/LVPECL compatible outputs. Therefore, terminat-
ing resistors (DC current path to ground) or current sources
must be used for functionality. These outputs are designed to
drive 50
transmission lines. Matched impedance techniques
should be used to maximize operating frequency and minimize
signal distortion. Figures 3A and 3B show two different layouts
which are recommended only as guidelines. Other suitable clock
layouts may exist and it would be recommended that the board
designers simulate to guarantee compatibility across all printed
circuit and clock component process variations.
T
ERMINATION
FOR
3.3V LVPECL O
UTPUTS
F
IGURE
2. S
INGLE
E
NDED
S
IGNAL
D
RIVING
D
IFFERENTIAL
I
NPUT
V
CC
- 2V
50
50
RTT
Z
o
= 50
Z
o
= 50
FOUT
FIN
RTT =
Z
o
1
((V
OH
+ V
OL
) / (V
CC
– 2)) – 2
3.3V
125
125
84
84
Z
o
= 50
Z
o
= 50
FOUT
FIN
F
IGURE
3B. LVPECL O
UTPUT
T
ERMINATION
F
IGURE
3A. LVPECL O
UTPUT
T
ERMINATION
W
IRING
THE
D
IFFERENTIAL
I
NPUT
TO
A
CCEPT
S
INGLE
E
NDED
L
EVELS
of R1 and R2 might need to be adjusted to position the V_REF in
the center of the input voltage swing. For example, if the input
clock swing is only 2.5V and V
CC
= 3.3V, V_REF should be 1.25V
and R2/R1 = 0.609.
R2
1K
V
CC
CLK_IN
+
-
R1
1K
C1
0.1uF
V_REF
相關(guān)PDF資料
PDF描述
ICS85304-01 LOW SKEW, 1-TO-5 DIFFERENTIAL-TO-3.3V LVPECL FANOUT BUFFER
ICS85304AG-01 LOW SKEW, 1-TO-5 DIFFERENTIAL-TO-3.3V LVPECL FANOUT BUFFER
ICS85304AG-01T LOW SKEW, 1-TO-5 DIFFERENTIAL-TO-3.3V LVPECL FANOUT BUFFER
ICS8530DY-01 LOW SKEW, 1-TO-16 DIFFERENTIAL-TO-3.3V LVPECL FANOUT BUFFER
ICS8530DY-01T LOW SKEW, 1-TO-16 DIFFERENTIAL-TO-3.3V LVPECL FANOUT BUFFER
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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ICS85304AG-01LFT 功能描述:IC CLOCK BUFFER MUX 2:5 20-TSSOP RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘緩沖器，驅(qū)動(dòng)器 系列:HiPerClockS™ 標(biāo)準(zhǔn)包裝:74 系列:- 類型:扇出緩沖器（分配） 電路數(shù):1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 輸入:HCSL, LVCMOS, LVDS, LVPECL, LVTTL 輸出:HCSL，LVDS 頻率 - 最大:400MHz 電源電壓:3 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:32-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:32-QFN（5x5） 包裝:管件
ICS85304AGI-01LF 制造商:Integrated Device Technology Inc 功能描述:IC CLK BUFFER 2:5 650MHZ 20TSSOP
ICS85304AGI-01LFT 制造商:Integrated Device Technology Inc 功能描述:IC CLK BUFFER 2:5 650MHZ 20TSSOP
ICS853052AGLF 功能描述:IC CLOCK MULTIPLEXER 2:1 8-TSSOP RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘緩沖器，驅(qū)動(dòng)器 系列:HiPerClockS™ 標(biāo)準(zhǔn)包裝:74 系列:- 類型:扇出緩沖器（分配） 電路數(shù):1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 輸入:HCSL, LVCMOS, LVDS, LVPECL, LVTTL 輸出:HCSL，LVDS 頻率 - 最大:400MHz 電源電壓:3 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:32-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:32-QFN（5x5） 包裝:管件
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