參數(shù)資料
型號: ICS853011AMLF
元件分類: 時(shí)鐘及定時(shí)
英文描述: LOW SKEW CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
封裝: 3.90 X 4.90 X 1.37 MM, SOIC-8
文件頁數(shù): 11/12頁
文件大小: 137K
代理商: ICS853011AMLF
853011AM
www.icst.com/products/hiperclocks.html
REV. A NOVEMBER 13, 2002
8
Integrated
Circuit
Systems, Inc.
ICS853011
LOW SKEW, 1-TO-2
DIFFERENTIAL-TO-2.5V/3.3V LVPECL/ECL FANOUT BUFFER
PRELIMINARY
POWER CONSIDERATIONS
This section provides information on power dissipation and junction temperature for the ICS853011.
Equations and example calculations are also provided.
1. Power Dissipation.
The total power dissipation for the ICS853011 is the sum of the core power plus the power dissipated in the load(s).
The following is the power dissipation for V
CC = 3.8V, which gives worst case results.
NOTE: Please refer to Section 3 for details on calculating power dissipated in the load.
Power (core)
MAX = VCC_MAX * IEE_MAX = 3.8V * 25mA = 95mW
Power (outputs)
MAX = 30.2mW/Loaded Output pair
If all outputs are loaded, the total power is 2 * 30.2mW = 60.4mW
Total Power
_MAX (3.8V, with all outputs switching) = 95mW + 60.4mW = 155.4mW
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the
device. The maximum recommended junction temperature for HiPerClockSTM devices is 125°C.
The equation for Tj is as follows: Tj =
θ
JA * Pd_total + TA
Tj = Junction Temperature
JA = Junction-to-Ambient Thermal Resistance
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
T
A = Ambient Temperature
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance
θ
JA must be used . Assuming a
moderate air flow of 200 linear feet per minute and a multi-layer board, the appropriate value is 103.3°C/W per Table 5 below.
Therefore, Tj for an ambient temperature of 85°C with all outputs switching is:
85°C + 0.155W * 103.3°C/W = 101°C. This is well below the limit of 125°C
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow,
and the type of board (single layer or multi-layer).
q
JA by Velocity (Linear Feet per Minute)
0
200
500
Single-Layer PCB, JEDEC Standard Test Boards
153.3°C/W
128.5°C/W
115.5°C/W
Multi-Layer PCB, JEDEC Standard Test Boards
112.7°C/W
103.3°C/W
97.1°C/W
NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.
TABLE 5. THERMAL RESISTANCE
q
JA
FOR
8-PIN SOIC, FORCED CONVECTION
相關(guān)PDF資料
PDF描述
ICS853011BMLFT 853011 SERIES, LOW SKEW CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
ICS853011BGLFT 853011 SERIES, LOW SKEW CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
ICS853011BG 853011 SERIES, LOW SKEW CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
ICS853011BMLFT 853011 SERIES, LOW SKEW CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
ICS853011BGT 853011 SERIES, LOW SKEW CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
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