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參數(shù)資料
| 型號： | ICS843156AKLFT |
| 廠商： | IDT, Integrated Device Technology Inc |
| 文件頁數(shù)： | 6/20頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CLK GENERATOR 32VFQFP |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 系列： | HiPerClockS™ |
| 類型： | 時(shí)鐘/頻率合成器 |
| PLL： | 帶旁路 |
| 輸入： | 晶體 |
| 輸出： | LVPECL |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 1:10 |
| 差分 - 輸入:輸出： | 無/是 |
| 頻率 - 最大： | 156.25MHz |
| 除法器/乘法器： | 是/無 |
| 電源電壓： | 2.375 V ~ 3.465 V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 32-VFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 32-VFQFPN 裸露焊盤（4x4） |
| 包裝： | 帶卷 (TR) |
ICS843156AK REVISION B NOVEMBER 28, 2012
14
2012 Integrated Device Technology, Inc.
ICS843156 Data Sheet
CRYSTAL-TO-LVPECL CLOCK SYNTHESIZER
Power Considerations
This section provides information on power dissipation and junction temperature for the ICS843156.
Equations and example calculations are also provided.
1.
Power Dissipation.
The total power dissipation for the ICS843156 is the sum of the core power plus the power dissipation in the load(s).
The following is the power dissipation for VCCO = 3.3V + 5% = 3.465V, which gives worst case results.
NOTE: Please refer to Section 3 for details on calculating power dissipation in the load.
Power (core)MAX = VCCO_MAX * IEE_MAX = 3.465V * 179mA = 620.235mW
Power (outputs)MAX = 30mW/Loaded Output pair
If all outputs are loaded, the total power is 10 * 30mW = 300mW
Total Power_MAX (3.3V, with all outputs switching) = 620.235mW + 300mW = 920.235mW
2. Junction Temperature.
unction temperature, Tj, is the temperature at the junction of the bond wire and bond pad directly affects the reliability of the device. The
maximum recommended junction temperature is 125°C. Limiting the internal transistor junction temperature, Tj, to 125°C ensures that the bond
wire and bond pad temperature remains below 125°C.
The equation for Tj is as follows: Tj =
JA * Pd_total + TA
Tj = Junction Temperature
JA = Junction-to-Ambient Thermal Resistance
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
TA = Ambient Temperature
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance
JA must be used. Assuming no air flow and
a multi-layer board, the appropriate value is 37°C/W per Table 7 below.
Therefore, Tj for an ambient temperature of 70°C with all outputs switching is:
70°C + 0.920W * 37°C/W = 1046°C. This is below the limit of 125°C.
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow and the type of
board (multi-layer).
Table 7. Thermal Resistance JA for 32 Lead VFQFN, Forced Convection
JA by Velocity
Meters per Second
01
2.5
Multi-Layer PCB, JEDEC Standard Test Boards
37.0°C/W
32.4°C/W
29.0°C/W
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