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參數(shù)資料
| 型號： | ICS843101IAG-100LF |
| 英文描述： | FEMTOCLOCKS⑩ CRYSTAL-TO-LVPECL 100MHZ FREQUENCY MARGINING SYNTHESIZER |
| 中文描述： | FEMTOCLOCKS⑩晶體到的LVPECL 100MHZ輸出頻率裕合成器 |
| 文件頁數(shù)： | 13/17頁 |
| 文件大?。?/td> | 243K |
| 代理商： | ICS843101IAG-100LF |
843101AGI-100
www.icst.com/products/hiperclocks.html
REV. A OCTOBER 20, 2005
13
Integrated
Circuit
Systems, Inc.
ICS843101I-100
F
EMTO
C
LOCKS
C
RYSTAL
-
TO
-LVPECL
100MH
Z
F
REQUENCY
M
ARGINING
S
YNTHESIZER
PRELIMINARY
P
OWER
C
ONSIDERATIONS
This section provides information on power dissipation and junction temperature for the ICS843101I-100.
Equations and example calculations are also provided.
1. Power Dissipation.
The total power dissipation for the ICS843101I-100 is the sum of the core power plus the power dissipated in the load(s).
The following is the power dissipation for V
= 3.3V + 5% = 3.465V, which gives worst case results.
NOTE:
Please refer to Section 3 for details on calculating power dissipated in the load.
Power (core)
MAX
= V
CC_MAX
* I
EE_MAX
= 3.465V * 92mA =
318.78mW
Power (outputs)
MAX
=
30mW/Loaded Output pair
Total Power
_MAX
(3.63V, with all outputs switching) =
318.78mW + 30mW =
348.78mW
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the
device. The maximum recommended junction temperature for HiPerClockS
TM
devices is 125°C.
The equation for Tj is as follows: Tj =
θ
JA
* Pd_total + T
A
Tj = Junction Temperature
θ
JA
= Junction-to-Ambient Thermal Resistance
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
T
A
= Ambient Temperature
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance
θ
must be used. Assuming a
moderate air flow of 200 linear feet per minute and a multi-layer board, the appropriate value is 81.8°C/W per Table 7 below.
Therefore, Tj for an ambient temperature of 85°C with all outputs switching is:
85°C + 0.349W *81.8°C/W = 113.5°C. This is below the limit of 125°C.
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow,
and the type of board (single layer or multi-layer).
θ
JA
by Velocity (Linear Feet per Minute)
0
200
500
Single-Layer PCB, JEDEC Standard Test Boards
Multi-Layer PCB, JEDEC Standard Test Boards
137.1°C/W
89.0°C/W
118.2°C/W
81.8°C/W
106.8°C/W
78.1°C/W
NOTE:
Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.
T
ABLE
7. T
HERMAL
R
ESISTANCE
θ
JA
FOR
16-
PIN
TSSOP, F
ORCED
C
ONVECTION
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| ICS843101IAG-100LFT | FEMTOCLOCKS⑩ CRYSTAL-TO-LVPECL 100MHZ FREQUENCY MARGINING SYNTHESIZER |
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| ICS843101IAG-100LFT | 制造商:ICS 制造商全稱:ICS 功能描述:FEMTOCLOCKS? CRYSTAL-TO-LVPECL 100MHZ FREQUENCY MARGINING SYNTHESIZER |
| ICS843101IAG-100T | 制造商:ICS 制造商全稱:ICS 功能描述:FEMTOCLOCKS? CRYSTAL-TO-LVPECL 100MHZ FREQUENCY MARGINING SYNTHESIZER |
| ICS843-106 | 制造商:ICS 制造商全稱:ICS 功能描述:106.25MHZ, LVCMOS, LVPECL DUAL OUTPUT OSCILLATOR |
| ICS8431-11 | 制造商:ICS 制造商全稱:ICS 功能描述:255MHZ, LOW JITTER, LVPECL FREQUENCY SYNTHESIZER |
| ICS8431-21 | 制造商:ICS 制造商全稱:ICS 功能描述:350MHZ, LOW JITTER, CRYSTAL OSCILLATOR-TO-3.3V LVPECL FREQUENCY SYNTHESIZER |
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