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參數(shù)資料
| 型號： | ICS8430DY-111T |
| 元件分類： | 時鐘及定時 |
| 英文描述： | 8430 SERIES, PLL BASED CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32 |
| 封裝： | 7 X 7 MM, 1.40 MM HEIGHT, MS-026, LQFP-32 |
| 文件頁數(shù)： | 1/17頁 |
| 文件大?。?/td> | 178K |
| 代理商： | ICS8430DY-111T |
8430DY-111
www.icst.com/products/hiperclocks.html
REV. F APRIL 10, 2006
1
PRELIMINARY
Integrated
Circuit
Systems, Inc.
ICS8430-111
700MHZ, LOW JITTER
DIFFERENTIAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER
GENERAL DESCRIPTION
The ICS8430-111 is a general purpose, dual out-
put high frequency synthesizer and a member of
the HiPerClockS family of High Performance
Clock Solutions from ICS. The CLK, nCLK pair
can accept most standard differential input lev-
els. The single ended TEST_CLK input accepts LVCMOS or
LVTTL input levels and translates them to 3.3V LVPECL levels.
The VCO operates at a frequency range of 200MHz to 700MHz.
With the output configured to divide the VCO frequency by 2,
output frequency steps as small as 2MHz can be achieved
using a 16MHz differential or single ended reference clock. Out-
put frequencies up to 700MHz can be programmed using the
serial or parallel interfaces to the configuration logic. The low
jitter and frequency range of the ICS8430-111 makes it an ideal
clock generator for most clock tree applications.
BLOCK DIAGRAM
PIN ASSIGNMENT
FEATURES
Dual differential 3.3V LVPECL output
Selectable 14MHz to 27MHz differential CLK, nCLK
or TEST_CLK input
CLK, nCLK accepts any differential input signal:
LVPECL, LVHSTL, LVDS, SSTL, HCSL
TEST_CLK accepts the following input types:
LVCMOS, LVTTL
Output frequency range up to 700MHz
VCO range: 200MHz to 700MHz
Parallel or serial interface for programming counter
and output dividers
Cycle-to-cycle jitter: 25ps (maximum)
3.3V supply voltage
0°C to 70°C ambient operating temperature
Available in both standard and lead-free RoHS compliant
packages
Industrial termperature information available upon request
VCO_SEL
CLK_SEL
TEST_CLK
CLK
S_LOAD
S_DATA
S_CLOCK
nP_LOAD
M0:M8
N0:N2
VCO
PLL
FOUT0
nFOUT0
FOUT1
nFOUT1
TEST
÷ N
CONFIGURATION
INTERFACE
LOGIC
÷ M
0
1
0
1
÷ 16
PHASE DETECTOR
÷ 2
HiPerClockS
ICS
nCLK
MR
The Preliminary Information presented herein represents a product in prototyping or pre-production. The noted characteristics are based on initial
product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves the right to change any circuitry or specifications without notice.
32 31 30 29 28 27 26 25
9
10 11 12 13 14 15 16
1
2
3
4
5
6
7
8
24
23
22
21
20
19
18
17
CLK
TEST_CLK
CLK_SEL
VCCA
S_LOAD
S_DATA
S_CLOCK
MR
M5
M6
M7
M8
N0
N1
N2
VEE
V
EE
nFOUT0
FOUT0
V
CCO
nFOUT1
FOUT1
V
CC
TEST
nCLK
nP_LOAD
VCO_SEL
M0
M1
M2
M3
M4
32-Lead LQFP
7mm x 7mm x 1.4mm package body
Y Package
Top View
ICS8430-111
相關PDF資料 |
PDF描述 |
|---|---|
| ICS8430DY-11LF | 700 MHz, OTHER CLOCK GENERATOR, PQFP32 |
| ICS8430DYI-01T | 500 MHz, OTHER CLOCK GENERATOR, PQFP32 |
| ICS8430DYI-11 | 700 MHz, OTHER CLOCK GENERATOR, PQFP32 |
| ICS8430DYI-11LFT | 700 MHz, OTHER CLOCK GENERATOR, PQFP32 |
| ICS8430DYI-11LF | 700 MHz, OTHER CLOCK GENERATOR, PQFP32 |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| ICS8430I-61 | 制造商:ICS 制造商全稱:ICS 功能描述:500MHZ, CRYSTAL-TO-3.3V DIFFERENTIAL LVPECL FREQUENCY SYNTHESIZER |
| ICS8430I-71B | 制造商:ICS 制造商全稱:ICS 功能描述:700MHZ, LOW JITTER, CRYSTAL INTERFACE / LVCMOS-TO-3.3V LVPECL FREQUENCY SYNTHESIZER |
| ICS8430S07AKILF | 功能描述:IC CLK GENERATOR PLL 32VFQFN RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 專用 系列:- 標準包裝:1,500 系列:- 類型:時鐘緩沖器/驅動器 PLL:是 主要目的:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 電源電壓:3.3V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SSOP（0.209"，5.30mm 寬） 供應商設備封裝:28-SSOP 包裝:帶卷 (TR) 其它名稱:93786AFT |
| ICS8430S07AKILFT | 功能描述:IC CLK GENERATOR PLL 32VFQFN RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 專用 系列:- 標準包裝:1,500 系列:- 類型:時鐘緩沖器/驅動器 PLL:是 主要目的:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 電源電壓:3.3V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SSOP（0.209"，5.30mm 寬） 供應商設備封裝:28-SSOP 包裝:帶卷 (TR) 其它名稱:93786AFT |
| ICS8430S07I | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:Clock Generator for Cavium Processors |
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