參數(shù)資料
型號(hào): ICS843003AGLF
廠(chǎng)商: IDT, Integrated Device Technology Inc
文件頁(yè)數(shù): 7/21頁(yè)
文件大?。?/td> 0K
描述: IC SYNTHESIZER LVPECL 24-TSSOP
標(biāo)準(zhǔn)包裝: 62
系列: HiPerClockS™, FemtoClock™
類(lèi)型: 頻率合成器
PLL: 帶旁路
輸入: 晶體
輸出: LVPECL
電路數(shù): 1
比率 - 輸入:輸出: 1:3
差分 - 輸入:輸出: 無(wú)/是
頻率 - 最大: 700MHz
除法器/乘法器: 是/無(wú)
電源電壓: 3.135 V ~ 3.465 V
工作溫度: 0°C ~ 70°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 24-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 24-TSSOP
包裝: 管件
其它名稱(chēng): 843003AGLF
ICS843003
FEMTOCLOCKS CRYSTAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER
IDT / ICS LVPECL FREQUENCY SYNTHESIZER
15
ICS843003AG REV. A FEBRUARY 19, 2008
Layout Guideline
Figure 6A shows a schematic example of the ICS843003. An
example of LVEPCL termination is shown in this schematic.
Additional LVPECL termination approaches are shown in the
LVPECL Termination Application Note. In this example, an 18 pF
parallel resonant 31.25MHz crystal is used. The C1= 27pF and
C2 = 33pF are recommended for frequency accuracy. The C1 and
C2 may be slightly adjusted for optimizing frequency accuracy.
Figure 6A. ICS843003 Schematic Example
PC Board Layout Example
Figure 5B shows an example of ICS843003 P.C. board layout. The
crystal X1 footprint shown in this example allows installation of
either surface mount HC49S or through-hole HC49 package. The
footprints of other components in this example are listed in the
Table 7. There should be at least one decoupling capacitor per
power pin. The decoupling capacitors should be located as close
as possible to the power pins. The layout assumes that the board
has clean analog power ground plane.
Figure 6B. ICS843003 PC Board Layout Example
Table 7. Footprint Table
NOTE: Table 7, lists component sizes shown in this layout
example.
R7
133
C2
33pF
Set Logic
Input to
'0'
VCCA
VCCO=3.3V
R6
82.5
RD2
1K
VCC
RU2
Not Install
VDD
C8
0.1u
C3
10uF
R9
133
Zo = 50 Ohm
VDD
+
-
RU1
1K
3.3V
R2
10
VCC
X1
31.25MHz
R4
82.5
U1
ICS843003
1
2
3
4
5
6
7
8
9
10
11
12
13 14 15 16 17 18 19 20 21 22 23 24
DI
V
_S
E
LB
0
VC
O
_SE
L
MR
VC
C
O
_A
QA
0
nQA0
OE
B
OE
A
FB
_D
IV
VC
C
A
VC
C
DI
V
_S
E
LA
0
D
IV_SELA
1
VEE XT
AL_O
U
T
XT
AL_I
N
T
EST
_C
LK
XT
AL_S
EL
nQB1 QB1 nQB0 QB0 VC
C
O
_B
D
IV_SELB
1
+
-
To Logic
Input
pins
C7
0.1u
Set Logic
Input to
'1'
VC
C
O
R5
133
Zo = 50 Ohm
1 8 p F
R10
82.5
C1
27pF
VCC=3.3V
R8
82.5
R3
133
Zo = 50 Ohm
VCCO
RD1
Not Install
C4
0.01u
Logic Control Input Examples
Zo = 50 Ohm
C6
0.1u
To Logic
Input
pins
3.3V
Reference
Size
C1, C2
0402
C3
0805
C4, C5, C6, C7, C8
0603
R2
0603
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