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參數(shù)資料
| 型號： | ICS843002AKI-40 |
| 英文描述： | 175MHZ, FEMTOCLOCKS-TM VCXO BASED SONET/SDH JITTER ATTENUATOR |
| 中文描述： | 175MHz時，F(xiàn)EMTOCLOCKS，商標VCXO的基于SONET / SDH的抖動衰減器 |
| 文件頁數(shù)： | 10/21頁 |
| 文件大小： | 277K |
| 代理商： | ICS843002AKI-40 |
843002AKI-40
www.icst.com/products/hiperclocks.html
REV. A JUNE 22, 2005
10
Integrated
Circuit
Systems, Inc.
ICS843002I-40
175MH
Z
, F
EMTO
C
LOCKS
VCXO B
ASED
SONET/SDH J
ITTER
A
TTENUATOR
PRELIMINARY
A
PPLICATION
I
NFORMATION
D
ESCRIPTION
OF
THE
PLL S
TAGES
The ICS843002I-40 is a two stage device, a VCXO PLL
followed by a low phase noise FemtoClock PLL. The VCXO
uses an external pullable crystal which can be pulled
±100ppm by the VCXO PLL circuitry to phase lock it to
the input reference frequency. The FemtoClock PLL is a
wide bandwidth PLL (about 800kHz) which means it will
phase track the VCXO PLL. Most of the reference clock
jitter attenuation needs to be accomplished by VCXO PLL.
By using the bypass FemtoClock PLL mode (Table 3B),
the selected input reference clock can be passed directly
to the FemtoClock PLL which will multiply it up by 32 to a
higher frequency. A second mode, VCXO and FemtoClock
bypass, routes the selected input refrence directly to the
LVPECL output dividers.
VCXO PLL L
OOP
R
ESPONSE
C
ONSIDERATIONS
Loop response characteristics of the VCXO PLL is affected
by the VCXO feedback divider value (bandwidth and damp-
ing factor), and by the external loop filter components
(bandwidth, damping factor, and 2
nd
frequency response).
A practical range of VCXO PLL bandwidth is from about
10Hz to about 1kHz. The setting of VCXO PLL bandwidth
and damping factor is covered later in this document. A
PC based PLL bandwidth calculator is also under devel-
opment. For assistance with loop bandwidth suggestions
or value calculation, please contact ICS applications.
S
ETTING
THE
VCXO PLL L
OOP
R
ESPONSE
The VCXO PLL loop response is determined both by fixed
device characteristics and by other characteristics set by the
user. This includes the values of R
, C
, C
and R
as shown
in the External VCXO PLL Components figure on this page.
The VCXO PLL loop bandwidth is approximated by:
W
HERE
:
R
S
= Value of resistor R
S
in loop filter in Ohms
I
CP
= Charge pump current in amps (see table on page 12)
K
O
= VCXO Gain in Hz/V
The above equation calculates the “normalized” loop bandwidth
(denoted as “NBW”) which is approximately equal to the - 3dB
bandwidth. NBW does not take into account the effects of
damping factor or the second pole imposed by C
. It does,
however, provide a useful approximation of filter performance.
To prevent jitter on the clock output due to modulation of the
VCXO PLL by the phase detector frequency, the following general
rule should be observed:
(Phase Detector) = Input Frequency ÷ (R Divider x 32)
The PLL loop damping factor is determined by:
W
HERE
:
C
S
= Value of capacitor C
S
in loop filter in Farads
NBW (VCXO PLL) =
R
S
x I
CP
x K
O
32
NBW (VCXO PLL)
≤
(Phase Detector)
20
DF (VCLK) = x
R
2
I
CP
x C
S
x K
O
32
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| ICS843002AKI-40LF | 功能描述:IC SYNTHESIZER LVPECL 32-VFQFPN RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:HiPerClockS™, FemtoClock™ 標準包裝:27 系列:Precision Edge® 類型:頻率合成器 PLL:是 輸入:PECL，晶體 輸出:PECL 電路數(shù):1 比率 - 輸入:輸出:1:1 差分 - 輸入:輸出:無/是 頻率 - 最大:800MHz 除法器/乘法器:是/無 電源電壓:3.135 V ~ 5.25 V 工作溫度:0°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:28-SOIC（0.295"，7.50mm 寬） 供應商設備封裝:28-SOIC 包裝:管件 |
| ICS843002AKI-40LFT | 功能描述:IC SYNTHESIZER LVPECL 32-VFQFPN RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:HiPerClockS™, FemtoClock™ 標準包裝:27 系列:Precision Edge® 類型:頻率合成器 PLL:是 輸入:PECL，晶體 輸出:PECL 電路數(shù):1 比率 - 輸入:輸出:1:1 差分 - 輸入:輸出:無/是 頻率 - 最大:800MHz 除法器/乘法器:是/無 電源電壓:3.135 V ~ 5.25 V 工作溫度:0°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:28-SOIC（0.295"，7.50mm 寬） 供應商設備封裝:28-SOIC 包裝:管件 |
| ICS843002AKI-40T | 制造商:ICS 制造商全稱:ICS 功能描述:175MHZ, FEMTOCLOCKS-TM VCXO BASED SONET/SDH JITTER ATTENUATOR |
| ICS843002AKI-41 | 制造商:Integrated Device Technology Inc 功能描述:IC SYNTHESIZER LVPECL 32VFQFN |
| ICS843002AKI-41LF | 功能描述:IC SYNTHESIZER LVPECL 32-VFQFPN RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:HiPerClockS™, FemtoClock™ 標準包裝:27 系列:Precision Edge® 類型:頻率合成器 PLL:是 輸入:PECL，晶體 輸出:PECL 電路數(shù):1 比率 - 輸入:輸出:1:1 差分 - 輸入:輸出:無/是 頻率 - 最大:800MHz 除法器/乘法器:是/無 電源電壓:3.135 V ~ 5.25 V 工作溫度:0°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:28-SOIC（0.295"，7.50mm 寬） 供應商設備封裝:28-SOIC 包裝:管件 |
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