IDT / ICS 2.5V LVPECL FREQUENCY SYNTHESIZER
12
ICS843001AK-40 REV. A OCTOBER 10, 2007
ICS843001-40
FEMTOCLOCKS CRYSTAL-TO-2.5V LVPECL FREQUENCY SYNTHESIZER
SCHEMATIC EXAMPLE
Figure 6 shows an example of ICS843001-40 application
schematic. In this example, the device is operated at V
CC
= 2.5V.
The 10pF parallel resonant 40MHz cr ystal is used in
characterization. The C1 and C2 capacitor are not required if a
10pF parallel resonant crystal is used. For different board layout,
Q
VCCO_LVPECL
VCC
C1
SPR
VCC
LVCMOS
SEL0
10pF
R7
50
R1
250
VCCO_REFOUT=2.5V
VCC=2.5V
Set Logic
Input to
'0'
C7
0.1uF
+
-
VCC
Zo = 50 Ohm
Logic Control Input Examples
To Logic
Input
pins
RU2
Not Install
R3
10
RD1
Not Install
VCCO_LVPECL
VCCO_LVPECL=2.5V
C3
0.01u
RD2
1K
R6
33
C4
0.1uF
VCCO_REFOUT
RU1
1K
XTAL_IN
R2
250
X1
40MHz
Zo = 50 Ohm
C2
SPR
LVPECL
SEL1
Zo = 50 Ohm
Q
VCCA
R9
18
VCC
+
-
Optional
Y-Termination
XTAL_OUT
U1
ICS843001-40
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
SEL1
XTAL_OUT
XTAL_IN
SEL0
VE
E
nc
V
C
O
_R
E
F
_O
U
T
VE
E
REF_OUT
VCC
VCCO_LVPECL
nQ
Q
nc
V
CCA
R5
62.5
nQ
C6
0.01u
To Logic
Input
pins
C5
10uF
VCCO
Set Logic
Input to
'1'
R4
62.5
R8
50
VCCO
FIGURE 6. EXAMPLE ICS843001-40 FREQUENCY SYNTHESIZER SCHEMATIC
the C1 and C2 may be slightly adjusted for optimizing frequency
accuracy. Two examples of LVPECL terminations are shown in
this schematic. Additional termination approaches are shown in
the LVPECL Termination Application Note.