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參數(shù)資料
| 型號： | ICS839893AYILF |
| 英文描述： | LOW SKEW, 1-TO-13 LVCMOS/LVTTL BUFFER DIVIDER |
| 中文描述： | 低偏移，1對13的LVCMOS / LVTTL緩沖區(qū)分壓器 |
| 文件頁數(shù)： | 8/10頁 |
| 文件大?。?/td> | 127K |
| 代理商： | ICS839893AYILF |
Integrated
Circuit
Systems, Inc.
839893AYI
www.icst.com/products/hiperclocks.html
REV. A AUGUST 8, 2005
8
ICS839893I
L
OW
S
KEW
, 1-
TO
-13
LVCMOS/LVTTL B
UFFER
D
IVIDER
R
ELIABILITY
I
NFORMATION
T
RANSISTOR
C
OUNT
The transistor count for ICS839893I is: 4615
T
ABLE
6.
θ
JA
VS
. A
IR
F
LOW
T
ABLE
FOR
48 L
EAD
LQFP
θ
JA
by Velocity (Linear Feet per Minute)
0
200
500
Single-Layer PCB, JEDEC Standard Test Boards
Multi-Layer PCB, JEDEC Standard Test Boards
67.8°C/W
47.9°C/W
55.9°C/W
42.1°C/W
50.1°C/W
39.4°C/W
NOTE:
Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.
A
PPLICATION
I
NFORMATION
I
NPUTS
:
CLK I
NPUT
:
For applications not requiring the use of the test clock, it can be
left floating. Though not required, but for additional protection, a
1k
Ω
resister can be tied from the CLK input to ground.
C
ONTROL
P
INS
:
All control pins have internal pull-ups and pull-downs;
additional resistance is not required but can be added for
additional protection. A 1k
Ω
resister can be used.
R
ECOMMENDATIONS
FOR
U
NUSED
I
NPUT
AND
O
UTPUT
P
INS
O
UTPUTS
:
LVCMOS O
UTPUT
:
All unused LVCMOS output can be left floating. We recommend
that there is no trace attached.
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| ICS839893AYILFT | LOW SKEW, 1-TO-13 LVCMOS/LVTTL BUFFER DIVIDER |
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| ICS839893AYILFT | 制造商:ICS 制造商全稱:ICS 功能描述:LOW SKEW, 1-TO-13 LVCMOS/LVTTL BUFFER DIVIDER |
| ICS839893AYIT | 制造商:ICS 制造商全稱:ICS 功能描述:LOW SKEW, 1-TO-13 LVCMOS/LVTTL BUFFER DIVIDER |
| ICS839893I | 制造商:ICS 制造商全稱:ICS 功能描述:LOW SKEW, 1-TO-13 LVCMOS/LVTTL BUFFER DIVIDER |
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