參數(shù)資料
型號(hào): ICS83940BYLFT
元件分類: 時(shí)鐘及定時(shí)
英文描述: 83940 SERIES, LOW SKEW CLOCK DRIVER, 18 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32
封裝: 7 X 7 MM, 1.40 MM HEIGHT, LEAD FREE, MS-026, LQFP-32
文件頁數(shù): 10/12頁
文件大?。?/td> 148K
代理商: ICS83940BYLFT
83940BY
www.icst.com/products/hiperclocks.html
REV. A DECEMBER 14, 2004
7
Integrated
Circuit
Systems, Inc.
ICS83940
LOW SKEW, 1-TO-18
LVPECL-TO-LVCMOS/LVTTL FANOUT BUFFER
APPLICATION INFORMATION
Figure 1 shows how the differential input can be wired to accept
single ended levels. The reference voltage V_REF = V
DD/2 is
generated by the bias resistors R1, R2 and C1. This bias circuit
should be located as close as possible to the input pin. The ratio
FIGURE 1. SINGLE ENDED SIGNAL DRIVING DIFFERENTIAL INPUT
of R1 and R2 might need to be adjusted to position the V_REF in
the center of the input voltage swing. For example, if the input
clock swing is only 2.5V and V
DD = 3.3V, V_REF should be 1.25V
and R2/R1 = 0.609.
WIRING THE DIFFERENTIAL INPUT TO ACCEPT SINGLE ENDED LEVELS
VDD
R2
1K
V_REF
C1
0.1u
R1
1K
Single Ended Clock Input
PCLK
nPCLK
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