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參數(shù)資料
| 型號： | ICS8305AGILFT |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘及定時 |
| 英文描述： | 8305 SERIES, LOW SKEW CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16 |
| 封裝： | 4.40 X 3 MM, 0.92 MM HEIGHT, ROHS COMPLIANT, MO-153, TSSOP-16 |
| 文件頁數(shù)： | 14/16頁 |
| 文件大?。?/td> | 416K |
| 代理商： | ICS8305AGILFT |
Integrated
Circuit
Systems, Inc.
8305AGI
www.icst.com/products/hiperclocks.html
REV. B MAY 19, 2005
7
ICS8305I
LOW SKEW, 1-TO-4, MULTIPLEXED DIFFERENTIAL/
LVCMOS-TO-LVCMOS/LVTTL FANOUT BUFFER
ADDITIVE PHASE JITTER
Input/Output Additive
Phase Jitter at 155.52MHz
= 0.04ps typical
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
-110
-120
-130
-140
-150
-160
-170
-180
-190
100
1k
10k
100k
1M
10M
100M
The spectral purity in a band at a specific offset from the funda-
mental compared to the power of the fundamental is called the
dBc Phase Noise. This value is normally expressed using a
Phase noise plot and is most often the specified plot in many
applications. Phase noise is defined as the ratio of the noise
power present in a 1Hz band at a specified offset from the fun-
damental frequency to the power value of the fundamental.This
ratio is expressed in decibels (dBm) or a ratio of the power in
As with most timing specifications, phase noise measurements
have issues. The primary issue relates to the limitations of the
equipment. Often the noise floor of the equipment is higher than
the noise floor of the device. This is illustrated above. The de-
the 1Hz band to the power in the fundamental. When the re-
quired offset is specified, the phase noise is called a
dBc value,
which simply means dBm at a specified offset from the funda-
mental. By investigating jitter in the frequency domain, we get a
better understanding of its effects on the desired application over
the entire time record of the signal. It is mathematically possible
to calculate an expected bit error rate given a phase noise plot.
vice meets the noise floor of what is shown, but can actually be
lower. The phase noise is dependant on the input source and
measurement equipment.
OFFSET FROM CARRIER FREQUENCY (HZ)
SSB
P
HASE
N
OISE
dB
c
/H
Z
ICS8305I
LOW SKEW, 1-TO-4, MULTIPLEXED DIFFERENTIAL/ LVCMOS-TO-LVCMOS/ LVTTL FANOUT BUFFER
TSD
IDT / ICS LOW SKEW, 1-TO-4, MULTIPLEXED DIFFERENTIAL/ LVCMOS-TO-LVCMOS/ LVTTL FANOUT BUFFER
ICS8305I
7
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ICS8305AGIT | 制造商:ICS 制造商全稱:ICS 功能描述:LOW SKEW, 1-TO-4, MULTIPLEXED DIFFERENTIAL/LVCMOS-TO-LVCMOS/LVTTL FANOUT BUFFER |
| ICS8305AGLF | 功能描述:IC CLOCK BUFFER MUX 2:4 16-TSSOP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘緩沖器，驅(qū)動器 系列:HiPerClockS™ 產(chǎn)品培訓模塊:High Bandwidth Product Overview 標準包裝:1,000 系列:Precision Edge® 類型:扇出緩沖器（分配） 電路數(shù):1 比率 - 輸入:輸出:1:4 差分 - 輸入:輸出:是/是 輸入:CML，LVDS，LVPECL 輸出:CML 頻率 - 最大:2.5GHz 電源電壓:2.375 V ~ 2.625 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-VFQFN 裸露焊盤，16-MLF? 供應(yīng)商設(shè)備封裝:16-MLF?（3x3） 包裝:帶卷 (TR) |
| ICS8305AGLFT | 功能描述:IC CLOCK BUFFER MUX 2:4 16-TSSOP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘緩沖器，驅(qū)動器 系列:HiPerClockS™ 標準包裝:74 系列:- 類型:扇出緩沖器（分配） 電路數(shù):1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 輸入:HCSL, LVCMOS, LVDS, LVPECL, LVTTL 輸出:HCSL，LVDS 頻率 - 最大:400MHz 電源電壓:3 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:32-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:32-QFN（5x5） 包裝:管件 |
| ICS8305AGT | 制造商:ICS 制造商全稱:ICS 功能描述:LOW SKEW, 1-TO-4, MULTIPLEXED DIFFERENTIAL/ LVCMOS-TO-LVCMOS/LVTTL FANOUT BUFFER |
| ICS8305I | 制造商:ICS 制造商全稱:ICS 功能描述:LOW SKEW, 1-TO-4, MULTIPLEXED DIFFERENTIAL/LVCMOS-TO-LVCMOS/LVTTL FANOUT BUFFER |
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