- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄360758 > ICS83023AMILF DIFFERENTIAL-TO-LVCMOS TRANSLATOR/BUFFER PDF資料下載
參數(shù)資料
| 型號： | ICS83023AMILF |
| 英文描述： | DIFFERENTIAL-TO-LVCMOS TRANSLATOR/BUFFER |
| 中文描述： | 差分至的LVCMOS翻譯/緩沖區(qū) |
| 文件頁數(shù)： | 7/12頁 |
| 文件大?。?/td> | 159K |
| 代理商： | ICS83023AMILF |
83023AMI
www.icst.com/products/hiperclocks.html
REV. B JANUARY 18, 2006
7
Integrated
Circuit
Systems, Inc.
ICS83023I
D
UAL
, 1-
TO
-1
D
IFFERENTIAL
-
TO
-LVCMOS T
RANSLATOR
/B
UFFER
A
PPLICATION
I
NFORMATION
Figure 1
shows how the differential input can be wired to accept
single ended levels. The reference voltage V_REF = V
/2 is
generated by the bias resistors R1, R2 and C1. This bias circuit
should be located as close as possible to the input pin. The
F
IGURE
1. S
INGLE
E
NDED
S
IGNAL
D
RIVING
D
IFFERENTIAL
I
NPUT
W
IRING
THE
D
IFFERENTIAL
I
NPUT
TO
A
CCEPT
S
INGLE
E
NDED
L
EVELS
ratio of R1 and R2 might need to be adjusted to position the
V_REF in the center of the input voltage swing. For example, if
the input clock swing is only 2.5V and V
DD
= 3.3V, V_REF should
be 1.25V and R2/R1 = 0.609.
V_REF
R1
1K
C1
0.1u
R2
1K
Single Ended Clock Input
CLK
nCLK
VDD
I
NPUTS
:
CLK/nCLK I
NPUT
:
For applications not requiring the use of the differential input,
both CLK and nCLK can be left floating. Though not required,
but for additional protection, a 1k
Ω
resistor can be tied from
CLK to ground.
R
ECOMMENDATIONS
FOR
U
NUSED
I
NPUT
AND
O
UTPUT
P
INS
O
UTPUTS
:
LVCMOS O
UTPUT
:
All unused LVCMOS output can be left floating. We
recommend that there is no trace attached.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ICS83023AMILFT | DIFFERENTIAL-TO-LVCMOS TRANSLATOR/BUFFER |
| ICS83023AMIT | DIFFERENTIAL-TO-LVCMOS TRANSLATOR/BUFFER |
| ICS830-23I | DIFFERENTIAL-TO-LVCMOS TRANSLATOR/BUFFER |
| ICS83023AMI | DUAL, 1-TO-1 DIFFERENTIAL-TO-LVCMOS TRANSLATOR/BUFFER |
| ICS91305YMLFT | High Performance Communication Buffer |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ICS83023AMILFT | 功能描述:IC CLK BUFFER TRANSLA 1:1 8-SOIC RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘緩沖器，驅(qū)動器 系列:HiPerClockS™ 標準包裝:74 系列:- 類型:扇出緩沖器（分配） 電路數(shù):1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 輸入:HCSL, LVCMOS, LVDS, LVPECL, LVTTL 輸出:HCSL，LVDS 頻率 - 最大:400MHz 電源電壓:3 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:32-VFQFN 裸露焊盤 供應商設(shè)備封裝:32-QFN（5x5） 包裝:管件 |
| ICS83023AMIT | 制造商:ICS 制造商全稱:ICS 功能描述:DIFFERENTIAL-TO-LVCMOS TRANSLATOR/BUFFER |
| ICS83023I | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:DUAL, 1-TO-1 DIFFERENTIAL-TOLVCMOS TRANSLATOR/BUFFER |
| ICS830-23I | 制造商:ICS 制造商全稱:ICS 功能描述:DIFFERENTIAL-TO-LVCMOS TRANSLATOR/BUFFER |
| ICS83026AMI | 制造商:ICS 制造商全稱:ICS 功能描述:LOW SKEW, 1-TO-2 DIFFERENTIAL-TO-LVCMOS/LVTTL FANOUT BUFFER |
發(fā)布緊急采購，3分鐘左右您將得到回復。