- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄360758 > ICS830-21I 2.5V, 3.3V DIFFERENTIAL-TO-LVCMOS/LVTTL TRANSLATOR PDF資料下載
參數(shù)資料
| 型號： | ICS830-21I |
| 英文描述： | 2.5V, 3.3V DIFFERENTIAL-TO-LVCMOS/LVTTL TRANSLATOR |
| 中文描述： | 2.5V和3.3V的DIFFERENTIAL-TO-LVCMOS/LVTTL譯者 |
| 文件頁數(shù)： | 5/12頁 |
| 文件大?。?/td> | 162K |
| 代理商： | ICS830-21I |
83021AMI
www.icst.com/products/hiperclocks.html
REV. C DECEMBER 12, 2005
5
Integrated
Circuit
Systems, Inc.
ICS83021I
1-
TO
-1
2.5V, 3.3V D
IFFERENTIAL
-
TO
-LVCMOS/LVTTL T
RANSLATOR
A
DDITIVE
P
HASE
J
ITTER
Additive Phase Jitter
@ 100MHz
(12kHz to 20MHz)
= 0.21ps typical
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
-110
-120
-130
-140
-150
-160
-170
-180
-190
1k
10k
100k
O
FFSET
F
ROM
C
ARRIER
F
REQUENCY
(H
Z
)
1M
10M
100M
The spectral purity in a band at a specific offset from the
fundamental compared to the power of the fundamental is
called the
dBc Phase Noise.
This value is normally expressed
using a Phase noise plot and is most often the specified plot
in many applications. Phase noise is defined as the ratio of
the noise power present in a 1Hz band at a specified offset
from the fundamental frequency to the power value of the
fundamental. This ratio is expressed in decibels (dBm) or a
As with most timing specifications, phase noise measure-
ments have issues. The primary issue relates to the limita-
tions of the equipment. Often the noise floor of the equipment
is higher than the noise floor of the device. This is illustrated
ratio of the power in the 1Hz band to the power in the funda-
mental. When the required offset is specified, the phase noise
is called a
dBc
value, which simply means dBm at a specified
offset from the fundamental. By investigating jitter in the fre-
quency domain, we get a better understanding of its effects
on the desired application over the entire time record of the
signal. It is mathematically possible to calculate an expected
bit error rate given a phase noise plot.
above. The device meets the noise floor of what is shown, but
can actually be lower. The phase noise is dependant on the
input source and measurement equipment.
S
H
O
Z
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ICS83021AMI | 2.5V, 3.3V DIFFERENTIAL-TO-LVCMOS/LVTTL TRANSLATOR |
| ICS83021I | 2.5V, 3.3V DIFFERENTIAL-TO-LVCMOS/LVTTL TRANSLATOR |
| ICS83023AMILF | DIFFERENTIAL-TO-LVCMOS TRANSLATOR/BUFFER |
| ICS83023AMILFT | DIFFERENTIAL-TO-LVCMOS TRANSLATOR/BUFFER |
| ICS83023AMIT | DIFFERENTIAL-TO-LVCMOS TRANSLATOR/BUFFER |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ICS83023 | 制造商:ICS 制造商全稱:ICS 功能描述:DUAL, 1-TO-1 DIFFERENTIAL-TO-LVCMOS TRANSLATOR/BUFFER |
| ICS83023AMI | 制造商:ICS 制造商全稱:ICS 功能描述:DIFFERENTIAL-TO-LVCMOS TRANSLATOR/BUFFER |
| ICS83023AMILF | 功能描述:IC CLK BUFFER TRANSLA 1:1 8-SOIC RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘緩沖器，驅(qū)動器 系列:HiPerClockS™ 標(biāo)準(zhǔn)包裝:74 系列:- 類型:扇出緩沖器（分配） 電路數(shù):1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 輸入:HCSL, LVCMOS, LVDS, LVPECL, LVTTL 輸出:HCSL，LVDS 頻率 - 最大:400MHz 電源電壓:3 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:32-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:32-QFN（5x5） 包裝:管件 |
| ICS83023AMILFT | 功能描述:IC CLK BUFFER TRANSLA 1:1 8-SOIC RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘緩沖器，驅(qū)動器 系列:HiPerClockS™ 標(biāo)準(zhǔn)包裝:74 系列:- 類型:扇出緩沖器（分配） 電路數(shù):1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 輸入:HCSL, LVCMOS, LVDS, LVPECL, LVTTL 輸出:HCSL，LVDS 頻率 - 最大:400MHz 電源電壓:3 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:32-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:32-QFN（5x5） 包裝:管件 |
| ICS83023AMIT | 制造商:ICS 制造商全稱:ICS 功能描述:DIFFERENTIAL-TO-LVCMOS TRANSLATOR/BUFFER |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。