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參數(shù)資料
| 型號： | ICS82C404XXCW16 |
| 英文描述： | Peripheral IC |
| 中文描述： | 外圍芯片 |
| 文件頁數(shù)： | 6/13頁 |
| 文件大小： | 610K |
| 代理商： | ICS82C404XXCW16 |
The serial data register is exactly 24 bits long, enough to accept
the data being sent. The stop bit acts a load command that
passes the contents of the Serial Data Register into the register
indicated by the three address bits. If a stop bit is not received
after the serial register is full, and more data is sent, all data in
the register is ignored and an error issued. If correct data is
received, then the unlocking mechanism rearms, all data in the
serial data register is ignored, and an error is issued.
Programming the ICS82C404
The
ICS82C404
has a wide operating range, but it is recom-
mended that it is operated within the following limits:
1 MHz < F
REF
< 60 MHz
F
REF
=Input
Reference Frequency
M=Reference divide
3 to 129
F
VCO
=VCO output
frequency
F
CLK
=output
frequency
200 kHz < F
REF/M
< 5 MHz
50 MHz < F
VCO
< 120 MHz
F
CLK
< 120 MHz
The frequency of the programmable oscillator F
VCO
is deter-
mined by the following fields:
Field
# of Bits
4
7
3
7
Index (I)
N counter value (N’)
Mux (R)
M counter value (M’)
Where the least significant bit is the last bit of M and the most
significant bit is the first bit of 1.
The equations used to determine the oscillator frequency are:
N=N’ + 3 M=M’+2
F
VCO
=Prescale
N/M
F
CLK
where < M < 129 and 4 < N < 130
and prescale=2 or 4, as set in the control register
The value of F
VCO
must remain between 50 MHz and
120 MHz. As a result, for output frequencies below 50 MHz,
F
VCO
must be brought into range. To achieve this, an output
divisor is selected by setting the values of the Mux Field (R)
as follows:
Output Divisor
R
Divisor
1
2
4
8
16
32
64
128
000
001
010
011
100
101
110
111
Unlike the ICD’s 82C404, the
ICS82C404
’s VCO does not
require tuning to place it in certain ranges. The
ICS82C404
’s
VCO will operate from 50 MHz to 120 MHz without adjusting
the VCO gain. However, to maintain compatibility, the I bits
are programmed as in the ICD2061A.
These bits are dummy bits except for the following two cases:
Index Field (I)
VCLK
F
VCO
Turn off VCLK
Mux MCLK to VLCK
I
MCLK F
VCO
50-120 MHz
50-120 MHz
1110
1111
When the index field is set to 1111, VCLK is turned off and
both channels run from the same MCLK VCO. This is done in
an effort to reduce jitter, which may increase when VCOs run
at 2
n
multiples of one another. If the two outputs must be
multiples of one another, it is best to mux MCLK over to the
output of the VCLK VCO, and to power-down the VCLK
VCO. The multiplexed frequency will be divided down by the
correct divisor (M) and output on VCLK.
ICS82C404
6
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| ICS830154AGI-08LF | 制造商:Integrated Device Technology Inc 功能描述:IC FANOUT BUFFER 1.5V 1:4 8TSSOP 制造商:Integrated Device Technology Inc 功能描述:IC CLK BUFFER 1:4 160MHZ 8TSSOP |
| ICS830154AGI-08LFT | 制造商:Integrated Device Technology Inc 功能描述:IC FANOUT BUFFER 1.5V 1:4 8TSSOP 制造商:Integrated Device Technology Inc 功能描述:IC CLK BUFFER 1:4 160MHZ 8TSSOP |
| ICS830154AMI-08LF | 功能描述:IC CLOCK BUFFER 1:4 160MHZ 8SOIC RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘緩沖器，驅(qū)動器 系列:HiPerClockS™ 標準包裝:74 系列:- 類型:扇出緩沖器（分配） 電路數(shù):1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 輸入:HCSL, LVCMOS, LVDS, LVPECL, LVTTL 輸出:HCSL，LVDS 頻率 - 最大:400MHz 電源電壓:3 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:32-VFQFN 裸露焊盤 供應商設備封裝:32-QFN（5x5） 包裝:管件 |
| ICS830154AMI-08LFT | 功能描述:IC CLOCK BUFFER 1:4 160MHZ 8SOIC RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘緩沖器，驅(qū)動器 系列:HiPerClockS™ 標準包裝:74 系列:- 類型:扇出緩沖器（分配） 電路數(shù):1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 輸入:HCSL, LVCMOS, LVDS, LVPECL, LVTTL 輸出:HCSL，LVDS 頻率 - 最大:400MHz 電源電壓:3 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:32-VFQFN 裸露焊盤 供應商設備封裝:32-QFN（5x5） 包裝:管件 |
| ICS830154I-08 | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:Over-Voltage Tolerant 1.5V, 1:4 Fanout Buffer |
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