參數(shù)資料
型號: ICS82C404N
英文描述: Dual Programmable Graphics Frequency Generator
中文描述: 雙頻率可編程圖形發(fā)生器
文件頁數(shù): 1/13頁
文件大?。?/td> 610K
代理商: ICS82C404N
ICS82C404RevA111095
Integrated
Circuit
Systems, Inc.
ICS82C404
Advance Information
General Description
The
ICS82C404
is a fully programmable graphics clock gen-
erator. It can generate user specified clock frequencies using
an externally generated input reference or by a single crystal.
The output frequency is programmed by entering a 24-bit
digital word through the serial port.
Two fully user-programmable phase-locked loops are offered
in a single package. One PLL is designed to drive the memory
clock, while the second drives the video clock. The outputs
may be changed on-the-fly to any desired frequency between
390 kHz and 120 MHz. The
ICS82C404
is ideally suited for
any design where multiple or varying frequencies are required.
This part is ideal for graphics applications. It generates low
jitter, high speed pixel clocks. It can be used to replace
multiple, expensive high speed crystal oscillators. The flexi-
bility of the device allows it to generate non-standard graph-
ics clocks.
The leader in the area of multiple clock output clocks on a
single chip, ICS has been shipping graphics frequency gener-
ators since October, 1990, and is constantly improving the
phase-locked loop. The
ICS82C404
incorporates a patented
fourth generation PLL that offers the best jitter performance
available.
Features
Pin-for-pin and function compatible with ICD’s version
of the 82C404
Dual programmable graphics clock generator
Memory and video clocks are individually programmable
“on-the-fly”
Ideal for designs where multiple or varying frequencies
are required
Increased frequency resolution from optional pre-divide-
by-2 on the M counter
Output enable feature available for tristating outputs
Independent clock outputs range from 390 kHz to
120 MHz
Operation up to 140 MHz available
Power-down capabilities
Low-power, high speed 0.8
μ
CMOS technology
Glitch-free transitions
Available in 16-pin PDIP or SOIC package
Dual Programmable Graphics Frequency Generator
Block Diagram
相關PDF資料
PDF描述
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