參數(shù)資料
型號(hào): ICS661GILFTR
元件分類: XO, clock
英文描述: 73.728 MHz, OTHER CLOCK GENERATOR, PDSO16
封裝: 4.40 MM, 0.50 MM PITCH, LEAD FREE, MO-153, TSSOP-16
文件頁數(shù): 2/6頁
文件大?。?/td> 123K
代理商: ICS661GILFTR
Precision Audio Clock Source
MDS 661 D
2
Revision 111804
Integrated Circuit Systems, Inc.
525 Race Street, San Jose, CA 95126 tel (408) 297-1201 www.icst.com
ICS661
Pin Assignment
16-pin 4.40 mil body, 0.50 mm pitch TSSOP
Output Clock Selection Table
Pin Descriptions
12
1
11
2
10
X1/REFIN
X2
3
9
VDD
4
VDD
REF
5
S0
6
VDDR
7
GND
8
GND
SELIN
VDDO
S3
S1
S2
CLK
16
15
14
13
S3
S2
S1
S0
Input
Frequency
(MHz)
Output
Frequency
(MHz)
0000
27
8.192
0001
27
11.2896
0010
27
12.288
0011
27
24.576
0100
27
12.288
0101
27
16.9344
0110
27
18.432
0111
27
36.864
1000
27
16.384
1001
27
22.5792
1010
27
24.576
1011
27
49.152
1100
27
24.576
1101
27
33.8688
1110
27
36.864
1111
27
73.728
Pin
Number
Pin
Name
Pin
Type
Pin Description
1
X1/REFIN
Input
Connect this pin to a crystal or clock input
2
VDD
Power
Power supply for crystal oscillator.
3
VDD
Power
Power supply for PLL.
4
S0
Input
Output frequency selection. Determines output frequency per table above. On chip pull-up.
5
GND
Power
Connect to ground.
6
GND
Power
Ground for output stage.
7
S3
Input
Output frequency selection. Determines output frequency per table above. On chip pull-up.
8
S2
Input
Output frequency selection. Determines output frequency per table above. On chip pull-up.
9
CLK
Output
Clock output.
10
S1
Input
Output frequency selection. Determines output frequency per table above. On chip pull-up.
11
VDDO
Power
Power supply for output stage.
12
SELIN
Input
Low for clock input, high for crystal. On chip pull-up.
13
GND
Power
Connect to ground.
14
VDDR
Power
Power supply for reference output. Ground to turn off REF.
15
REF
Output
Reference clock output.
16
X2
Input
Connect this pin to a crystal. Leave open if using a clock input.
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