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參數(shù)資料
| 型號(hào)： | ICS650-14B |
| 英文描述： | Networking System Clock |
| 中文描述： | 網(wǎng)絡(luò)系統(tǒng)時(shí)鐘 |
| 文件頁(yè)數(shù)： | 2/4頁(yè) |
| 文件大?。?/td> | 45K |
| 代理商： | ICS650-14B |
ICS650-14B
Networking System Clock
MDS 650-14B A
Integrated Circuit Systems, Inc. 525 Race Street San Jose CA 95126(408)295-9800tel www.icst.com
2
Revision 082800
Printed 11/15/00
PRELIMINARY INFORMATION
Pin Descriptions
Key: XI, XO = crystal connections; I = Input; I(Pu) = Input with pull up O = Output; P = power supply connection; TI = tri level input
Number
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Name
SELB0
X2
X1/ICLK
VDD
SELB1
GND
CLKB
CLKC
CLKA5
25M
OE
CLKA1
CLKA4
GND
SELA1
VDD
CLKA3
CLKA2
SELA0
SELC
Type
T I
XO
XI
P
I(Pu)
P
O
O
O
O
I(Pu)
O
O
P
T I
P
O
O
T I
T I
Description
Select pin for CLKB. See Table 2.
Crystal connection. Connect to 25 MHz crystal or leave unconnected for a clock input.
Crystal connection. Connect to 25 MHz fundamental crystal or clock input.
Connect to +3.3 V or +5 V. Must be same as other VDDs.
Select pin for CLK B. See table 2.
Connect to ground.
Selectable clock output. See Table 2.
Selectable clock output. See Table 3.
Selectable clock output. See Table 1.
25.0 MHz clock output.
Output Enable. Tri-states all output clocks when low. Internal pull-up.
Selectable clock output. See Table 1.
Selectable clock output. See Table 1.
Connect to ground.
Select pin for CLKA1:4 and CLKA5 outputs. See Table 1.
Connect to +3.3V or +5.0V. Must be same as other VDDs.
Selectable clock output. See Table 1.
Selectable clock output. See Table 1.
Select pin for CLKA1:4 and CLKA5 outputs. See Table 1.
Select pin for CLKC output. See Table 3.
Pin Assignment
1
2
3
4
5
6
7
8
9
16
15
14
13
12
11
VDD
SELB1
CLKA5
25M
X2
VDD
SELA1
20 pin (150 mil) SSOP
10
SELA0
CLKA2
CLKA3
X1/ICLK
SELB0
SELC
CLKA1
OE
CLKC
CLKB
18
17
19
20
GND
CLKA4
GND
SELC
0
M
1
CLKC
CLKB/4
62.5
125
Table 3
0 = connect directly to ground
1 = connect directly to VDD
M = leave unconnected (floating)
SELB1
0
0
0
1
1
1
SELB0
0
M
1
0
M
1
CLKB
30
27
48
83.33
19.44
80
Table 2
SELA1
0
0
0
M
M
M
1
1
1
SELA0
0
M
1
0
M
1
0
M
1
CLKA1:4
33.33
50
66.67
100
33.33
50
33.33
25
66.67
CLKA5
66.66
75
133.33
33.33
83.33
125
100
75
100
Table 1
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| ICS650-22 | PVR and STB Clock Source |
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| ICS650-21 | 制造商:ICS 制造商全稱:ICS 功能描述:System Peripheral Clock Source |
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| ICS650-27 | 制造商:ICS 制造商全稱:ICS 功能描述:Networking Clock Source |
| ICS650-36 | 制造商:ICS 制造商全稱:ICS 功能描述:Networking & PCI Clock Source |
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