- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄61070 > ICS621NLF (INTEGRATED DEVICE TECHNOLOGY INC) 621 SERIES, LOW SKEW CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), DSO8 PDF資料下載
參數(shù)資料
| 型號： | ICS621NLF |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘及定時 |
| 英文描述： | 621 SERIES, LOW SKEW CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), DSO8 |
| 封裝： | 2 X 2 MM, 0.50 MM PITCH, GREEN, DFN-8 |
| 文件頁數(shù)： | 3/10頁 |
| 文件大?。?/td> | 230K |
| 代理商： | ICS621NLF |
ICS621
LOW SKEW 1 TO 4 CLOCK BUFFER
FAN OUT BUFFER
IDT / ICS LOW SKEW 1 TO 4 CLOCK BUFFER
2
ICS621
REV A 062006
Pin Assignment (8-pin SOIC)
Pin Descriptions
External Components
A minimum number of external components are required for proper operation. A decoupling capacitor of 0.01
F
should be connected between VDD on pin 7 and GND on pin 6, as close to the device as possible. A 33
series
terminating resistor may be used on each clock output if the trace is longer than 1 inch.
To achieve the low output skew that the ICS621 is capable of, careful attention must be paid to board layout.
Essentially, all four outputs must have identical terminations, identical loads and identical trace geometries. If they
do not, the output skew will be degraded. For example, using a 30
series termination on one output (with 33 on
the others) will cause at least 15 ps of skew.
1
2
3
4
5
6
7
8
ICLK
Q1
Q2
Q3
Q4
OE
VDD
GND
1
Q3
Q2
GND
VDD
Q1
Q4
ICLK
OE
5
8
4
Pin
Number
Pin
Name
Pin
Type
Pin Description
1
ICLK
Input
Clock Input. 3.3 V tolerant input.
2
Q1
Output
Clock Output 1.
3
Q2
Output
Clock Output 2.
4
Q3
Output
Clock Output 3.
5
Q4
Output
Clock Output 4.
6
GND
Power
Connect to ground.
7
VDD
Power
Connect to +1.2 V or +1.8 V.
8
OE
Input
Output Enable. Tri-states outputs when low. Connect to VDD for normal operation.
相關PDF資料 |
PDF描述 |
|---|---|
| ICS650G-40AT | 189 MHz, OTHER CLOCK GENERATOR, PDSO16 |
| ICS650G-40T | 189 MHz, OTHER CLOCK GENERATOR, PDSO16 |
| ICS650GI-36LF | 125 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO16 |
| ICS650R-01IT | 80 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO20 |
| ICS650R-01LF | 80 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO20 |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| ICS621NLFT | 功能描述:IC CLOCK BUFFER 1:4 200MHZ 8-DFN RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘緩沖器，驅動器 系列:- 標準包裝:74 系列:- 類型:扇出緩沖器（分配） 電路數(shù):1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 輸入:HCSL, LVCMOS, LVDS, LVPECL, LVTTL 輸出:HCSL，LVDS 頻率 - 最大:400MHz 電源電壓:3 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:32-VFQFN 裸露焊盤 供應商設備封裝:32-QFN（5x5） 包裝:管件 |
| ICS-624-AGG | 制造商:Samtec Inc 功能描述:CONN DIP SCKT SKT 24 POS 2.54MM SLDR ST TH - Bulk |
| ICS-624-AGT | 制造商:Samtec Inc 功能描述:CONN DIP SCKT SKT 24 POS 2.54MM SLDR ST TH - Bulk |
| ICS-624-ATT | 制造商:Samtec Inc 功能描述:CONN DIP SCKT SKT 24 POS 2.54MM SLDR ST TH - Bulk |
| ICS-624-EGG | 制造商:Samtec Inc 功能描述:CONN DIP SCKT SKT 24 POS 2.54MM SLDR ST TH - Bulk |
發(fā)布緊急采購，3分鐘左右您將得到回復。