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參數(shù)資料
| 型號(hào)： | ICS620-01 |
| 英文描述： | Digital Still Camera Clock Source |
| 中文描述： | 數(shù)碼相機(jī)時(shí)鐘源 |
| 文件頁(yè)數(shù)： | 3/4頁(yè) |
| 文件大?。?/td> | 64K |
| 代理商： | ICS620-01 |
ICS620-01
Digital Still Camera Clock Source
MDS 620-01 B
Integrated Circuit Systems 1271
Parkmoor Ave.San JoseCA95126(408)295-9800tel(408)295-9818fax
3
Revision 072098 Printed 12/4/00
PRELIMINARY INFORMATION
ICRO
C
LOC K
Electrical Specifications
External Components
The ICS620-01 requires some inexpensive external components for proper operation. Decoupling capacitors of 0.1μF should be
connected on VDD pins 5, 7+8, and 21 to ground, as close to the ICS620-01 as possible. A series termination resistor of 33
should
be used for each clock output. The 14.31818 MHz crystal should be parallel resonant with an accuracy of 30ppm or better. For
tuning, the formula 2(C
L
-6) gives the value of each capacitor that should be connected between X1 and ground and X2 and ground,
where C
L
= the crystal load (or “correlation”) capacitance.
Parameter
ABSOLUTE MAXIMUM RATINGS
Supply Voltage, VDD
Inputs and Clock Outputs
Ambient Operating Temperature
Soldering Temperature
Storage temperature
DC CHARACTERISTICS
Operating Voltage, VDD
Input High Voltage, VIH
Input Low Voltage, VIL
Input High Voltage, VIH
Input Mid-level Voltage
Input Low Voltage, VIL
Output High Voltage, VOH
Output High Voltage, VOH
Output Low Voltage, VOL
Operating Supply Current, IDD
Short Circuit Current
On-Chip Pull-up Resistor
Input Capacitance
AC CHARACTERISTICS
Input Frequency
Output Clock Rise Time
Output Clock Fall Time
Output Clock Duty Cycle
Absolute Jitter
Conditions
Minimum
Typical
Maximum
Units
Referenced to GND
Referenced to GND
7
V
V
°C
°C
°C
-0.5
0
VDD+0.5
70
260
150
Max of 10 seconds
-65
3
2
5.5
V
V
V
V
V
V
V
V
V
Pins 6, 16, 20, 24, 27
Pins 6, 16, 20, 24, 27
Pins 1, 9, 28
Pins 1, 9, 28
Pins 1, 9, 28
IOH=-4mA
IOH=-25mA
IOL=25mA
No Load
Each output
Pins 6, 16, 20, 24, 27
All inputs but X1
0.8
VDD-0.5
Leave pin unconnected or tri-stated
0.5
VDD-0.4
2.4
0.4
TBD
±70
250
7
mA
mA
k
pF
14.31818
MHz
ns
ns
%
ps
0.8 to 2.0V
2.0 to 0.8V
at VDD/2
TBD
TBD
55
45
49 to 51
TBD
Note:
1. Stresses beyond those listed under Absolute Maximum Ratings could cause permanent damage to the device. Prolonged exposure
to levels above the operating limits but below the Absolute Maximums may affect device reliability.
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相關(guān)代理商/技術(shù)參數(shù) |
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| ICS620-01R | 制造商:ICS 制造商全稱:ICS 功能描述:Digital Still Camera Clock Source |
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| ICS620AK-06LF | 功能描述:IC CLOCK SYNTHESIZER PDA 32-QFN RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘發(fā)生器，PLL，頻率合成器 系列:- 標(biāo)準(zhǔn)包裝:2,000 系列:- 類型:PLL 時(shí)鐘發(fā)生器 PLL:帶旁路 輸入:LVCMOS，LVPECL 輸出:LVCMOS 電路數(shù):1 比率 - 輸入:輸出:2:11 差分 - 輸入:輸出:是/無 頻率 - 最大:240MHz 除法器/乘法器:是/無 電源電壓:3.135 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:32-LQFP 供應(yīng)商設(shè)備封裝:32-TQFP（7x7） 包裝:帶卷 (TR) |
| ICS620AK-06LFT | 功能描述:IC CLOCK SYNTHESIZER PDA 32-QFN RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘發(fā)生器，PLL，頻率合成器 系列:- 標(biāo)準(zhǔn)包裝:2,000 系列:- 類型:PLL 時(shí)鐘發(fā)生器 PLL:帶旁路 輸入:LVCMOS，LVPECL 輸出:LVCMOS 電路數(shù):1 比率 - 輸入:輸出:2:11 差分 - 輸入:輸出:是/無 頻率 - 最大:240MHz 除法器/乘法器:是/無 電源電壓:3.135 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:32-LQFP 供應(yīng)商設(shè)備封裝:32-TQFP（7x7） 包裝:帶卷 (TR) |
| ICS621 | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:LOW SKEW 1 TO 4 CLOCK BUFFER |
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