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參數(shù)資料
| 型號(hào)： | ICS527R-04LFT |
| 元件分類： | 時(shí)鐘及定時(shí) |
| 英文描述： | 527 SERIES, PLL BASED CLOCK DRIVER, 1 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28 |
| 封裝： | 0.150 INCH, 0.025 INCH PITCH, MO-153, SSOP-28 |
| 文件頁(yè)數(shù)： | 1/9頁(yè) |
| 文件大?。?/td> | 165K |
| 代理商： | ICS527R-04LFT |
ICS527-04
MDS 527-04 D
1
Revision 122804
Integrated Circuit Systems, Inc.
● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com
Clock Slicer User Configurable PECL input Zero Delay Buffer
Description
The ICS527-04 Clock Slicer is the most flexible way to
generate an output clock from an input clock with zero
skew. The user can easily configure the device to
produce nearly any output clock that is multiplied or
divided from the input clock. The part supports
non-integer multiplications and divisions. Using
Phase-Locked Loop (PLL) techniques, the device
accepts an input clock up to 200 MHz and produces an
output clock up to 160 MHz.
The ICS527-04 aligns rising edges on PECLIN with
FBPECL at a ratio determined by the reference and
feedback dividers.
For other PECL output clocks, see the ICS507-01,
ICS525-03, or the MK3707. For PECL in and CMOS
out, see the ICS527-02. For CMOS in and PECL out
with zero delay, use the ICS527-03.
Features
Packaged as 28-pin SSOP (150 mil body)
Synchronizes fractional clocks rising edges
CMOS in to PECL out
PECL in to PECL out
Pin selectable dividers
Zero input to output skew
User determines the output frequency - no software
needed
Slices frequency or period
Input clock frequency of 1.5 MHz - 200 MHz
Output clock frequencies up to 160 MHz
Very low jitter
Duty cycle of 45/55
Operating voltage of 3.3 V
Advanced, low power CMOS process
Block Diagram
PECLIN
VDD
GND
2
PECLO
Reference
Divider
PECLIN
Phase Comparator,
Charge Pump, and
Loop Filter
VCO
Output
Divider
7
R6:R0
F6:F0
S1:S0
Feedback
Divider
1
0
Divide
by 2
FBPECL
1
0
Divide
by 2
VDD
RES
IRANGE
560 ohm
68 ohm
180 ohm
68 ohm
180 ohm
2
PECLO
VDD
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ICS527R-04 | 527 SERIES, PLL BASED CLOCK DRIVER, 1 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28 |
| ICS541MT | PLL BASED CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8 |
| ICS544MI-01 | 156 MHz, OTHER CLOCK GENERATOR, PDSO8 |
| ICS544M-01LF | 156 MHz, OTHER CLOCK GENERATOR, PDSO8 |
| ICS544MI-01T | 156 MHz, OTHER CLOCK GENERATOR, PDSO8 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ICS527R-04T | 功能描述:IC CLK SLICER PECL ZDB 28-SSOP RoHS:否 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘發(fā)生器，PLL，頻率合成器 系列:- 產(chǎn)品變化通告:Product Discontinuation 04/May/2011 標(biāo)準(zhǔn)包裝:96 系列:- 類型:時(shí)鐘倍頻器，零延遲緩沖器 PLL:帶旁路 輸入:LVTTL 輸出:LVTTL 電路數(shù):1 比率 - 輸入:輸出:1:8 差分 - 輸入:輸出:無(wú)/無(wú) 頻率 - 最大:133.3MHz 除法器/乘法器:是/無(wú) 電源電壓:3 V ~ 3.6 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:管件 其它名稱:23S08-5HPGG |
| ICS5300V-1 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Video DAC with Color Palette (RAMDAC) |
| ICS5300V-2 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Video DAC with Color Palette (RAMDAC) |
| ICS5300V-3 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Video DAC with Color Palette (RAMDAC) |
| ICS5301V-1 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Video DAC with Color Palette (RAMDAC) |
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