參數(shù)資料
型號: ICS525-01RLFT
廠商: IDT, Integrated Device Technology Inc
文件頁數(shù): 3/10頁
文件大?。?/td> 0K
描述: IC CLK USER CONFIGURABLE 28-SSOP
產(chǎn)品培訓(xùn)模塊: Clock Distibution and Generation 1.0
標(biāo)準(zhǔn)包裝: 1
系列: OSCaR™
類型: 時鐘發(fā)生器,扇出配送
PLL: 帶旁路
輸入: 時鐘,晶體
輸出: CMOS
電路數(shù): 1
比率 - 輸入:輸出: 1:2
差分 - 輸入:輸出: 無/無
頻率 - 最大: 160MHz
除法器/乘法器: 是/無
電源電壓: 3 V ~ 5.5 V
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 28-SSOP(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 28-QSOP
包裝: 標(biāo)準(zhǔn)包裝
其它名稱: 800-1800-6
ICS525-01/02/11/12
USER CONFIGURABLE CLOCK
CLOCK MULTIPLIER
IDT USER CONFIGURABLE CLOCK
2
ICS525-01/02/11/12 REV T 053012
Pin Assignment
Pin Descriptions
KEY: I(PU) = Input with internal pull-up resistor; X1, X2 = crystal connections
18
7
17
8
16
9
15
X1/ICLK
10
X2
11
GND
12
CLK
13
V0
14
V1
GND
PD
V8
V2
V7
V5
V3
V6
22
21
20
19
V4
REF
5
6
S2
VDD
24
23
R0
3
4
S0
S1
R1
26
25
R2
1
2
R5
R6
R3
28
27
R4
ICS525-01/-02/-11/-12
Pin
Number
Pin
Name
Pin
Type
Pin Description
1, 2,
24-28
R5, R6,
R0-R4
I(PU)
Reference divider word input pins determined by user. Forms a binary number from 0
to 127.
3, 4, 5
S0, S1, S2
I(PU)
Select pins for output divider determined by user. See table on page 3
6, 23
VDD
Power
Connect to VDD.
7
X1/ICLK
X1
Crystal connection. Connect to a parallel resonant fundamental crystal or input clock.
8
X2
Crystal connection. Connect to a crystal or leave unconnected for clock.
9, 20
GND
Power
Connect to ground.
10 - 18
V0 - V8
I(PU)
VCO divider word input pins determined by user. Forms a binary number from 0 to
511.
19
PD
Input
Power-down. Active low. Turns off entire chip when low. Clock outputs tri-stated.
21
CLK
Output
Output clock determined by status of R0-R6, V-V8, S0-S2, and input frequency.
22
REF
Output
Reference output. Buffered crystal oscillator (or clock ) output.
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