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參數(shù)資料
| 型號： | ICS503MT |
| 廠商： | IDT, Integrated Device Technology Inc |
| 文件頁數(shù)： | 1/7頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC PLL CLK MULTIPLIER 8-SOIC |
| 產(chǎn)品變化通告： | Product Discontinuation 13/May/2009 |
| 標準包裝： | 2,500 |
| 系列： | LOCO™ |
| 類型： | 時鐘發(fā)生器 |
| PLL： | 是 |
| 輸入： | 時鐘，晶體 |
| 輸出： | CMOS |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 1:1 |
| 差分 - 輸入:輸出： | 無/無 |
| 頻率 - 最大： | 160MHz |
| 除法器/乘法器： | 無/是 |
| 電源電壓： | 3 V ~ 5.5 V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 8-SOIC |
| 包裝： | 帶卷 (TR) |
| 其它名稱： | 503MT |
DATASHEET
LOCO PLL CLOCK MULTIPLIER
ICS503
IDT / ICS LOCO PLL CLOCK MULTIPLIER
1
ICS503
REV D 051310
Description
The ICS503 is a member of the LOCOTM family, the
most cost effective way to generate a high-quality, high
frequency clock output from a lower frequency crystal
or clock input. The name LOCO stands for Low Cost
Oscillator, as it is designed to replace crystal oscillators
in most electronic systems. Using Phase-Locked-Loop
(PLL) techniques, the device uses a standard
fundamental mode, inexpensive crystal to produce
output clocks up to 160 MHz.
Stored in the chip’s ROM is the ability to generate nine
different multiplication factors, allowing one chip to
output many common frequencies (see table on page
2).
This product is intended for clock generation. It has low
output jitter (variation in the output period), but input to
output skew and jitter are not defined or guaranteed.
For applications which require defined input to output
skew, use the ICS570B.
Features
Packaged as 8-pin SOIC (Pb-free) or die
IDT’s lowest cost PLL clock
Generates 16.9344 MHz for stereo codecs from the
14.31818 MHz motherboard clock.
Can be cost effective in replacing a single
surface-mount crystal
Can be driven by other 5xx series
Input crystal frequency of 5 - 27 MHz
Input clock frequency of 2 - 50 MHz
Output clock frequencies up to 160 MHz
Low jitter - 50 ps one sigma
Duty cycle of 45/55 up to 160 MHz
Operating voltages of 3.0 to 5.5V
25 mA drive capability at TTL levels
Advanced, low power CMOS process
Block Diagram
PLL Clock
Multiplier
Circuitry and
ROM
Crystal or
Clock input
VDD
Crystal
OScillator
S1, S0
X1/ICLK
X2
2
CLK
GND
Optional crystal
capacitors
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| ICS548G-05T | IC CLOCK MULT T1/E1 16-TSSOP |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ICS504M | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Industrial Control IC |
| ICS504MT | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Industrial Control IC |
| ICS507-01 | 制造商:ICS 制造商全稱:ICS 功能描述:PECL Clock Synthesizer |
| ICS507-01-DPK | 制造商:ICS 制造商全稱:ICS 功能描述:PECL Clock Synthesizer |
| ICS507-01-DSW | 制造商:ICS 制造商全稱:ICS 功能描述:PECL Clock Synthesizer |
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