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參數(shù)資料
| 型號： | ICS343MIP |
| 英文描述： | Field Programmable Triple Output SS VersaClock Synthesizer |
| 中文描述： | 現(xiàn)場可編程三路輸出不銹鋼VersaClock合成器 |
| 文件頁數(shù)： | 2/7頁 |
| 文件大?。?/td> | 149K |
| 代理商： | ICS343MIP |
Field Programmable Triple Output SS VersaClock
MDS 343 F
2
Revision 090704
Integrated Circuit Systems, Inc.
●
525 Race Street, San Jose, CA 95126
●
tel (408) 297-1201
●
www.icst.com
ICS343
Pin Assignment
8-pin (150 mil) SOIC
Output Clock Selection Table
Pin Descriptions
External Components
Series Termination Resistor
Clock output traces over one inch should use series
termination. To series terminate a 50
trace (a
commonly used trace impedance), place a 33
resistor
in series with the clock line, as close to the clock output
pin as possible. The nominal impedance of the clock
output is 20
.
Decoupling Capacitor
As with any high-performance mixed-signal IC, the
ICS343 must be isolated from system power supply
noise to perform optimally.
A decoupling capacitor of 0.01μF must be connected
between VDD and the PCB ground plane.
Crystal Load Capacitors
The device crystal connections should include pads for
small capacitors from X1 to ground and from X2 to
ground. These capacitors are used to adjust the stray
capacitance of the board to match the nominally
required crystal load capacitance. Because load
capacitance can only be increased in this trimming
process, it is important to keep stray capacitance to a
minimum by using very short PCB traces (and no vias)
been the crystal and device. Crystal capacitors must be
connected from each of the pins X1 and X2 to ground.
The value (in pF) of these crystal caps should equal
(C
L
-6 pF)*2. In this equation, C
L
= crystal load
capacitance in pF. Example: For a crystal with a 16 pF
load capacitance, each crystal capacitor would be 20
pF [(16-6) x 2] = 20.
PCB Layout Recommendations
For optimum device performance and lowest output
phase noise, the following guidelines should be
observed.
1) The 0.01μF decoupling capacitor should be mounted
on the component side of the board as close to the
VDD pin as possible. No vias should be used between
X1/ICLK
VDD
GND
PDTS
CLK1
CLK2
CLK3
X2
1
2
3
4
8
7
6
5
CLK2
User
Configurable
User
Configurable
CLK2
User
Configurable
User
Configurable
CLK3
User
Configurable
User
Configurable
Output
Frequency
Spread
Amount
Pin
Number
1
2
3
4
5
6
7
8
Pin
Name
X1/ICLK
VDD
GND
CLK1
CLK3
CLK2
PDTS
X2
Pin
Type
XI
Power
Power
Output
Output
Output
Input
XO
Pin Description
Connect this pin to a crystal or external clock input.
Connect to +3.3 V.
Connect to ground.
Clock output. Weak internal pull-down when tri-state.
Clock output. Weak internal pull-down when tri-state.
Clock output. Weak internal pull-down when tri-state.
Powers down entire chip. Tri-states CLK outputs when low. Internal pull-up.
Connect this pin to a crystal, or float for clock input.
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| ICS343 | Field Programmable Triple Output SS VersaClock Synthesizer |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ICS343MIPLF | 功能描述:IC VERSACLOCK SYNTHESIZER 8-SOIC RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:VersaClock™ 標(biāo)準(zhǔn)包裝:2,000 系列:- 類型:PLL 頻率合成器 PLL:是 輸入:晶體 輸出:時鐘 電路數(shù):1 比率 - 輸入:輸出:1:1 差分 - 輸入:輸出:無/無 頻率 - 最大:1GHz 除法器/乘法器:是/無 電源電壓:4.5 V ~ 5.5 V 工作溫度:-20°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-LSSOP（0.175"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:16-SSOP 包裝:帶卷 (TR) 其它名稱:NJW1504V-TE1-NDNJW1504V-TE1TR |
| ICS343MIPLFT | 功能描述:IC VERSACLOCK SYNTHESIZER 8-SOIC RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:VersaClock™ 標(biāo)準(zhǔn)包裝:2,000 系列:- 類型:PLL 時鐘發(fā)生器 PLL:帶旁路 輸入:LVCMOS，LVPECL 輸出:LVCMOS 電路數(shù):1 比率 - 輸入:輸出:2:11 差分 - 輸入:輸出:是/無 頻率 - 最大:240MHz 除法器/乘法器:是/無 電源電壓:3.135 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:32-LQFP 供應(yīng)商設(shè)備封裝:32-TQFP（7x7） 包裝:帶卷 (TR) |
| ICS343MIPT | 功能描述:IC VERSACLOCK SYNTHESIZER 8-SOIC RoHS:否 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:VersaClock™ 產(chǎn)品變化通告:Product Discontinuation 04/May/2011 標(biāo)準(zhǔn)包裝:96 系列:- 類型:時鐘倍頻器，零延遲緩沖器 PLL:帶旁路 輸入:LVTTL 輸出:LVTTL 電路數(shù):1 比率 - 輸入:輸出:1:8 差分 - 輸入:輸出:無/無 頻率 - 最大:133.3MHz 除法器/乘法器:是/無 電源電壓:3 V ~ 3.6 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:管件 其它名稱:23S08-5HPGG |
| ICS343MLF | 制造商:ICSI 制造商全稱:Integrated Circuit Solution Inc 功能描述:Field Programmable Triple Output SS VersaClock Synthesizer |
| ICS343MP | 功能描述:IC VERSACLOCK SYNTHESIZER 8-SOIC RoHS:否 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:VersaClock™ 產(chǎn)品變化通告:Product Discontinuation 04/May/2011 標(biāo)準(zhǔn)包裝:96 系列:- 類型:時鐘倍頻器，零延遲緩沖器 PLL:帶旁路 輸入:LVTTL 輸出:LVTTL 電路數(shù):1 比率 - 輸入:輸出:1:8 差分 - 輸入:輸出:無/無 頻率 - 最大:133.3MHz 除法器/乘法器:是/無 電源電壓:3 V ~ 3.6 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:管件 其它名稱:23S08-5HPGG |
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