參數(shù)資料
型號: ICS251PMLFT
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: 時鐘產(chǎn)生/分配
英文描述: 200 MHz, OTHER CLOCK GENERATOR, PDSO8
封裝: 0.150 INCH, ROHS COMPLIANT, SOIC-8
文件頁數(shù): 1/10頁
文件大小: 216K
代理商: ICS251PMLFT
DATASHEET
FIELD PROGRAMMABLE SS VERSACLOCK SYNTHESIZER
ICS251
IDT / ICS FIELD PROGRAMMABLE SS VERSACLOCK SYNTHESIZER 1
ICS251
REV B 061306
Description
The ICS251 is a low cost, single-output, field programmable
clock synthesizer. The ICS251 can generate an output
frequency from 314 kHz to 200 MHz and may employ
Spread Spectrum techniques to reduce system
electro-magnetic interference (EMI).
Using ICS’ VersaClocksoftware to configure the PLL and
output, the ICS251 contains a One-Time Programmable
(OTP) ROM to allow field programmability. Programming
features include 4 selectable configuration registers.
The device employs Phase-Locked Loop (PLL) techniques
to run from a standard fundamental mode, inexpensive
crystal, or clock. It can replace multiple crystals and
oscillators, saving board space and cost.
The device also has a power-down feature that tri-states the
clock outputs and turns off the PLLs when the PDTS pin is
taken low.
The ICS251 is also available in factory programmed custom
versions for high-volume applications.
Features
8-pin SOIC package
Four addressable registers
Input crystal frequency of 5 to 27 MHz
Clock input frequency of 3 to 150 MHz
Output clock frequencies up to 200 MHz
Configurable Spread Spectrum Modulation
Operating voltage of 3.3 V
Replaces multiple crystals and oscillators
Controllable output drive levels
Advanced, low-power CMOS process
Available in RoHS compliant packaging
Block Diagram
Crystal
Oscillator
PLL Clock Synthesis,
Spred Spectrum and
Control Circuitry
CLK
PDTS (output and PLL)
OTP ROM
with PLL
Divider
Values
S1:0
2
VDD
GND
X2
Crystal or
clock input
External capacitors are
required with a crystal input.
X1/ICLK
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