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參數(shù)資料
| 型號： | ICS2509C |
| 英文描述： | 3.3V Phase-Lock Loop Clock Driver |
| 中文描述： | 3.3鎖相環(huán)時鐘驅(qū)動器 |
| 文件頁數(shù)： | 6/7頁 |
| 文件大?。?/td> | 248K |
| 代理商： | ICS2509C |
6
ICS2509C
General Layout Precautions:
An ICS2509C is used as an example. It is similar to the
ICS2510C. The same rules and methods apply.
1) Use copper flooded ground on the top signal layer
under the clock buffer The area under U1 in figure 1
on the right is an example.
2) Use power vias for power and ground. Vias 20 mil or
larger in diameter have lower high frequency
impedance. Vias for signals may be minimum drill
size.
3) Make all power and ground traces are as wide as the
via pad for lower inductance.
4) VAA for pin 23 has a low pass RC filter to decouple
the digital and analog supplies. C9-11 may be replaced
with a single low ESR (0.8 ohm or less) device with
the same total capacitance.
5) Notice that ground vias are never shared.
6) All VCC pins have a decoupling capacitor. Power is
always routed from the plane connection via to the
capacitor pad to the VCC pin on the clock buffer.
7) Component R1 is located at the clock source.
Component Values:
C1= As necessary for delay adjust
C[7:2]=.01uF
C8,C13=0.1uF
C[11:9]=4.7Uf
R1=10 ohm. Locate at driver
R2=10 ohm.
Figure 1.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ICS2509CyG-T | 3.3V Phase-Lock Loop Clock Driver |
| ICS2510CG-T | 3.3V Phase-Lock Loop Clock Driver |
| ICS2510C | 3.3V Phase-Lock Loop Clock Driver |
| ICS2572 | User-Programmable Dual High-Performance Clock Generator |
| ICS2572M | User-Programmable Dual High-Performance Clock Generator |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ICS2509CYG-T | 制造商:ICS 制造商全稱:ICS 功能描述:3.3V Phase-Lock Loop Clock Driver |
| ICS251 | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:FIELD PROGRAMMABLE SS VERSACLOCK SYNTHESIZER |
| ICS2510C | 制造商:ICS 制造商全稱:ICS 功能描述:3.3V Phase-Lock Loop Clock Driver |
| ICS2510CG | 功能描述:IC CLOCK DVR PLL 3.3V 24-TSSOP RoHS:否 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:- 標(biāo)準(zhǔn)包裝:2,000 系列:- 類型:PLL 時鐘發(fā)生器 PLL:帶旁路 輸入:LVCMOS，LVPECL 輸出:LVCMOS 電路數(shù):1 比率 - 輸入:輸出:2:11 差分 - 輸入:輸出:是/無 頻率 - 最大:240MHz 除法器/乘法器:是/無 電源電壓:3.135 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:32-LQFP 供應(yīng)商設(shè)備封裝:32-TQFP（7x7） 包裝:帶卷 (TR) |
| ICS2510CGLF | 功能描述:IC CLOCK DVR PLL 3.3V 24-TSSOP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:- 標(biāo)準(zhǔn)包裝:2,000 系列:- 類型:PLL 時鐘發(fā)生器 PLL:帶旁路 輸入:LVCMOS，LVPECL 輸出:LVCMOS 電路數(shù):1 比率 - 輸入:輸出:2:11 差分 - 輸入:輸出:是/無 頻率 - 最大:240MHz 除法器/乘法器:是/無 電源電壓:3.135 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:32-LQFP 供應(yīng)商設(shè)備封裝:32-TQFP（7x7） 包裝:帶卷 (TR) |
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