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參數(shù)資料
| 型號(hào)： | ICM7555IBAZ-T |
| 廠商： | Intersil |
| 文件頁(yè)數(shù)： | 6/12頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC OSC MONO TIMING 1MHZ 8-SOIC |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 類(lèi)型： | 555 型，計(jì)時(shí)器/振蕩器（單路） |
| 頻率： | 1MHz |
| 電源電壓： | 2 V ~ 18 V |
| 電流 - 電源： | 60µA |
| 工作溫度： | -25°C ~ 85°C |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 包裝： | 標(biāo)準(zhǔn)包裝 |
| 供應(yīng)商設(shè)備封裝： | 8-SOIC |
| 安裝類(lèi)型： | 表面貼裝 |
| 其它名稱(chēng)： | ICM7555IBAZ-TDKR |
3
FN2867.9
August 24, 2006
Absolute Maximum Ratings
Thermal Information
Supply Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+18V
Input Voltage
Trigger, Control Voltage, Threshold,
Reset (Note 1) . . . . . . . . . . . . . . . . . . . . . V+ +0.3V to GND -0.3V
Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100mA
Operating Conditions
Temperature Range
ICM7555C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to +70°C
ICM7555I, ICM7556I . . . . . . . . . . . . . . . . . . . . . . -25°C to +85°C
ICM7556M . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55°C to +125°C
Thermal Resistance (Typical, Note 2)
θJA (°C/W) θJC (°C/W)
14 Lead CERDIP Package. . . . . . . . . .
80
24
14 Lead PDIP Package* . . . . . . . . . . .
115
N/A
8 Lead PDIP Package* . . . . . . . . . . . .
130
N/A
8 Lead SOIC Package . . . . . . . . . . . . .
170
N/A
Maximum Junction Temperature (Hermetic Package) . . . . . . . +175°C
Maximum Junction Temperature (Plastic Package) . . . . . . . +150°C
Maximum Storage Temperature Range . . . . . . . . -65°C to +150°C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . +300°C
(SOIC - Lead Tips Only)
* Pb-free PDIPs can be used for through hole wave solder
processing only. They are not intended for use in Reflow solder
processing applications.
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. Due to the SCR structure inherent in the CMOS process used to fabricate these devices, connecting any terminal to a voltage greater than
V+ +0.3V or less than V- -0.3V may cause destructive latchup. For this reason it is recommended that no inputs from external sources not
operating from the same power supply be applied to the device before its power supply is established. In multiple supply systems, the supply
of the ICM7555 and ICM7556 must be turned on first.
2.
θ
JA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief 379 for details.
Electrical Specifications
Applies to ICM7555 and ICM7556, unless otherwise specified
PARAMETER
SYMBOL
TEST CONDITIONS
TA = +25°C
(NOTE 4)
-55°C TO
+125°C
UNITS
MIN
TYP
MAX
MIN
TYP
MAX
Static Supply Current
IDD
ICM7555
VDD = 5V
40
200
300
μA
VDD = 15V
60
300
μA
ICM7556
VDD = 5V
80
400
600
μA
VDD = 15V
120
600
μA
Monostable Timing Accuracy
RA = 10K, C = 0.1μF, VDD = 5V
2
%
858
1161
μs
Drift with Temperature
(Note 3)
VDD = 5V
150
ppm/
°C
VDD = 10V
200
ppm/
°C
VDD = 15V
250
ppm/
°C
Drift with Supply (Note 3)
VDD = 5V to 15V
0.5
%/V
Astable Timing Accuracy
RA = RB = 10K, C = 0.1μF, VDD = 5V
2
%
1717
2323
μs
Drift with Temperature
(Note 3)
VDD = 5V
150
ppm/
°C
VDD = 10V
200
ppm/
°C
VDD = 15V
250
ppm/
°C
Drift with Supply (Note 3)
VDD = 5V to 15V
0.5
%/V
Threshold Voltage
VTH
VDD = 15V
62677161
72
% VDD
Trigger Voltage
VTRIG
VDD = 15V
28323627
37
% VDD
Trigger Current
ITRIG
VDD = 15V
10
50
nA
Threshold Current
ITH
VDD = 15V
10
50
nA
Control Voltage
VCV
VDD = 15V
62677161
72
% VDD
ICM7555, ICM7556
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