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參數資料
| 型號： | ICM7170IPG |
| 廠商： | HARRIS SEMICONDUCTOR |
| 元件分類： | XO, clock |
| 英文描述： | Microprocessor-Compatible, Real-Time Clock |
| 中文描述： | 0 TIMER(S), REAL TIME CLOCK, PDIP24 |
| 文件頁數： | 6/13頁 |
| 文件大小： | 77K |
| 代理商： | ICM7170IPG |
12-10
Pin Descriptions
FIGURE 4. WRITE CYCLE TIMING FOR MULTIPLEXED BUS (RD = V
IH
)
SIGNAL
PIN NUMBER
SOIC
PIN NUMBER
DESCRIPTION
WR
1
19
Write Input
ALE
2
20
Address Latch Enable Input
CS
3
21
Chip Select Input
A4-A0
4 - 8
22 - 2
Address Inputs
OSC OUT
9
3
Oscillator Output
OSC IN
10
4
Oscillator Input
INT SOURCE
11
5
Interrupt Source
INTERRUPT
12
6
Interrupt Output
V
SS
(GND)
13
7
Digital Common
V
BACKUP
14
8
Battery Negative Side
D0 - D7
15 - 22
9 - 16
Data I/O
V
DD
23
17
Positive Digital Supply
RD
24
18
Read Input
TABLE 1. COMMAND REGISTER FORMAT
COMMAND REGISTER ADDRESS (10001b, 11h) WRITE-ONLY
D7
D6
D5
D4
D3
D2
D1
D0
n/a
n/a
Normal/Test
Mode
Interrupt
Enable
Run/Stop
12/24 Hour
Format
Crystal
Frequency
Crystal
Frequency
TABLE 2. COMMAND REGISTER BIT ASSIGNMENTS
D5
TEST BIT
D4
INTERRUPT
ENABLE
D3
RUN/STOP
D2
24/12 HOUR
FORMAT
D1
D0
CRYSTAL
FREQUENCY
0
Normal Mode
0
Interrupt disabled
0
Stop
0
12-Hour Mode
0
0
32.768kHz
1
Test Mode
1
Interrupt enable
1
Run
1
24-Hour Mode
0
1
1.048576MHZ
1
0
2.097152MHz
1
1
4.194304MHz
Timing Diagrams
(Continued)
ADDRESS VALID, CS LOW
INPUT DATA VALID
A0 - A4, D0 - D7, CS
ALE
WR
t
LA
t
CYC
t
AD
t
AL
t
LL
t
DW
t
WA
t
WD
t
WL
ICM7170
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