參數(shù)資料
型號： ICM7170
廠商： Intersil Corporation
英文描述： Microprocessor-Compatible, Real-Time Clock
中文描述： 微處理器兼容，實時時鐘
文件頁數(shù)： 7/13頁
文件大?。?/td> 77K
代理商： ICM7170
12-11
TABLE 3. ADDRESS CODES AND FUNCTIONS
ADDRESS
FUNCTION
DATA
VALUE
A4
A3
A2
Al
A0
HEX
D7
D6
D5
D4
D3
D2
D1
D0
0
0
0
0
0
00
Counter-1/100 seconds
-
0 - 99
0
0
0
0
1
01
Counter-hours
-
-
-
0 - 23
12 Hour Mode
-
-
-
1 - 12
0
0
0
1
0
02
Counter-minutes
-
-
0 - 59
0
0
0
1
1
03
Counter-seconds
-
-
0 - 59
0
0
1
0
0
04
Counter-month
-
-
-
-
1 - 12
0
0
1
0
1
05
Counter-date
-
-
-
1 - 31
0
0
1
1
0
06
Counter-year
-
0 - 99
0
0
1
1
1
07
Counter-day of week
-
-
-
-
-
0 - 6
0
1
0
0
0
08
RAM-1/100 seconds
M
0 - 99
0
1
0
0
1
09
RAM-hours
-
M
-
0 - 23
12 Hour Mode
M
-
-
1 - 12
0
1
0
1
0
0A
RAM-minutes
M
-
.
.
0 - 59
0
1
0
1
1
0B
RAM-seconds
M
-
.
.
0 - 59
0
1
1
0
0
0C
RAM-month
M
-
-
-
1 - 12
0
1
1
0
1
0D
RAM-date
M
-
-
1 - 31
0
1
1
1
0
0E
RAM-year
M
0 - 99
0
1
1
1
1
0F
RAM-day of week
M
-
-
-
-
0 - 6
1
0
0
0
0
10
Interrupt Status and Mask
Register
+
1
0
0
0
1
11
Command register
-
-
NOTES:
Addresses 10010 to 11111 (12h to 1Fh) are unused.
‘+’ Unused bit for interrupt Mask Register, MSB bit for interrupt Status Register.
‘-’ Indicates unused bits.
‘
’ AM/PM indicator bit in 12 hour format Logic “0” indicates AM, logic “1” indicates PM.
‘M’ Alarm compare for particular counter will be enabled if bit is set to logic “0”.
TABLE 4. INTERRUPT AND STATUS REGISTERS FORMAT
INTERRUPT MASK REGISTER ADDRESS (10000b, 10h) WRITE-ONLY
D7
D6
D5
D4
D3
D2
D1
D0
NOT USED
DAY
HOUR
MIN
SEC
1/10 SEC
1/100 SEC
ALARM
←
Periodic Interrupt Mask Bits
→
Alarm/Compare Mask Bit
INTERRUPT STATUS REGISTER ADDRESS (10000b, 10h) READ-ONLY
D7
D6
D5
D4
D3
D2
D1
D0
GLOBAL INTERRUPT
DAY
HOUR
MIN
SEC
1/10 SEC
1/100 SEC
ALARM
Periodic and Alarm Flags
←
Periodic Interrupt Flags
→
Alarm Compare Flag
ICM7170
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