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參數(shù)資料
| 型號： | ICL7134 |
| 廠商： | Intersil Corporation |
| 英文描述： | Quad LVDS Receiver with -4 to 5V Common-mode Range 16-TSSOP -40 to 85 |
| 中文描述： | 14位乘法微處理器兼容D / A轉(zhuǎn)換 |
| 文件頁數(shù)： | 3/16頁 |
| 文件大?。?/td> | 773K |
| 代理商： | ICL7134 |
3
Pin Descriptions
28 LEAD
CERDIP
PIN
NAME
PIN DESCRIPTION
1
CS
Chip Select (active low). Enables register write.
2
WR
WRITE, (active low). Writes in register. Equivalent to CS.
3
D
0
Bit 0
Least Significant
4
D
1
Bit1
Input Data Bits (High = True)
5
D
2
Bit 2
6
D
3
Bit 3
7
D
4
Bit 4
8
D
5
Bit 5
9
D
6
Bit 6
10
D
7
Bit 7
11
D
8
Bit 8
12
D
9
Bit 9
13
D
10
Bit 10
14
D
11
Bit 11
15
D
12
Bit 12
16
D
13
Bit 13
Most significant
17
PROG
Used for programming only. Tie to +5V for normal operation.
18
V
RFL
V
REF
for lower bits.
19
R
INV
Summing node for reference inverting amplifier.
20
V
RFM
FV
REF
for MSB only (bipolar)
21
R
FB
Feedback resistor for voltage output applications.
22
DGND
Digital Ground Return.
23
AGND
F
Analog Ground force lines. Use to carry current from internal Analog GND connections. Tied internally to AGND
S
.
24
AGND
S
Analog Ground sense line. Reference point for external circuitry. Pin should carry minimal current; tied internally to
AGND
F
.
25
I
OUT
Current output pin.
26
V+
Positive Supply.
27
A
1
Address 1
Registers Select Lines
28
A
0
Address 0
ICL7134
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