參數(shù)資料
型號: ICE2B265
英文描述: ?max. Pout=32W. fop=67kHz. Vbreak=650V. DIP8?
中文描述: ?最大。噘\u003d 32W。紈褲子弟\u003d 67kHz。 Vbreak \u003d?650V。 DIP8?
文件頁數(shù): 8/23頁
文件大?。?/td> 1231K
代理商: ICE2B265
Datasheet
Preliminary Data
8
November 2001
CoolSET
-F2
ICE2B165/265/365
Functional Description
Preliminary Specification
The primary current is sensed by the external series
resistor R
Sense
inserted in the source of the integrated
CoolMOS
. By means of Current Mode the regulation
of the secondary voltage is insensitive on line
variations. Line variation causes varition of the
increasing current slope which controls the duty cycle.
The external R
allows an individual adjustment of
the maximum source current of the integrated
CoolMOS
.
Figure 6
Improved Current Mode
To improve the Current Mode during light load
conditions the amplified current ramp of the PWM-OP
is superimposed on a voltage ramp, which is built by
the switch T
, the voltage source V
and the 1st order
low pass filter composed of R
and C
(see Figure 6,
Figure 7). Every time the oscillator shuts down for max.
duty cycle limitation the switch T2 is closed by V
.
When the oscillator triggers the Gate Driver T2 is
opened so that the voltage ramp can start.
In case of light load the amplified current ramp is to
small to ensure a stable regulation. In that case the
Voltage Ramp is a well defined signal for the
comparison with the FB-signal. The duty cycle is then
controlled by the slope of the Voltage Ramp.
By means of the C5 Comparator the Gate Driver is
switched-off until the voltage ramp exceeds 0.3V. It
allows the duty cycle to be reduced continously till 0%
by decreasing V
FB
below that threshold.
Figure 7
Light Load Conditions
3.2.1
PWM-OP
The input of the PWM-OP is applied over the internal
leading edge blanking to the external sense resistor
R
Sense
connected to pin ISense. R
Sense
converts the
source current into a sense voltage. The sense voltage
is amplified with a gain of 3.65 by PWM OP. The output
of the PWM-OP is connected to the voltage source V1.
The voltage ramp with the superimposed amplified
current singal is fed into the positive inputs of the PWM-
Comparator, C5 and the Soft-Start-Comparator.
3.2.2
PWM-Comparator
The PWM-Comparator compares the sensed current
signal of the integrated CoolMOS
TM
with the feedback
signal V
(see Figure 8). V
is created by an external
optocoupler or external transistor in combination with
the internal pullup resistor R
FB
and provides the load
information of the feedback circuitry. When the
amplified current signal of the integrated CoolMOS
exceeds the signal V
FB
the PWM-Comparator switches
off the Gate Driver.
x3.65
PWM OP
0.8V
10k
Oscillator
PWM Comparator
20pF
T
2
R
1
C
1
FB
PWM-Latch
V
1
C5
0.3V
Gate Driver
Voltage Ramp
V
OSC
Soft-Start Comparator
t
t
V
OSC
0.8V
FB
Gate Driver
Voltage Ramp
t
max.
Duty Cycle
0.3V
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