參數(shù)資料
型號(hào)： ICE2B165
英文描述： ?max. Pout=18W. fop=67kHz. Vbreak=650V. DIP8?
中文描述： ？最大。噘\u003d 18W。紈褲子弟\u003d 67kHz。 Vbreak \u003d?650V。 DIP8？
文件頁(yè)數(shù)： 11/23頁(yè)
文件大?。?/td> 1231K
代理商： ICE2B165
Datasheet
Preliminary Data
11
November 2001
CoolSET
-F2
ICE2B165/265/365
Functional Description
Preliminary Specification
3.5.2
Propagation Delay Compensation
In case of overcurrent detection by I
Limit
the shut down
of CoolMOS
is delayed due to the propagation delay
of the circuit. This delay causes an overshoot of the
peak current I
which depends on the ratio of dI/dt of
the peak current (see Figure 14).
.
Figure 14
Current Limiting
The overshoot of Signal2 is bigger than of Signal1 due
to the steeper rising waveform.
A propagation delay compensation is integrated to
bound the overshoot dependent on dI/dt of the rising
primary current. That means the propagation delay
time between exceeding the current sense threshold
V
and the switch off of CoolMOS
is compensated
over temperature within a range of at least.
dI
R
Sense
0
×
≤
So current limiting is now capable in a very accurate
way (see Figure 16).
Figure 15
Dynamic Voltage Threshold V
csth
The propagation delay compensation is done by
means of a dynamic threshold voltage V
csth
(see Figure
15). In case of a steeper slope the switch off of the
driver is earlier to compensate the delay.
E.g. I
peak
= 0.5A with R
Sense
= 2 . Without propagation
delay compensation the current sense threshold is set
to a static voltage level V
=1V. A current ramp of
dI/dt = 0.4A/μs, that means dV
/dt = 0.8V/μs, and a
propagation delay time of i.e. t
=180ns
leads then to a I
overshoot of 12%. By means of
propagation delay compensation the overshoot is only
about 2% (see Figure 16).
Figure 16
Overcurrent Shutdown
3.6
PWM-Latch
The oscillator clock output applies a set pulse to the
PWM-Latch when initiating CoolMOS
conduction.
After setting the PWM-Latch can be reset by the PWM-
OP, the Soft-Start-Comparator, the Current-Limit-
Comparator, Comparator C3 or the Error-Latch of the
Protection Unit. In case of reseting the driver is shut
down immediately.
3.7
Driver
The driver-stage drives the gate of the CoolMOS
and is optimized to minimize EMI and to provide high
circuit efficiency. This is done by reducing the switch on
slope when reaching the CoolMOS
threshold. This is
achieved by a slope control of the rising edge at the
driver
’
s output (see Figure 17).
Thus the leading switch on spike is minimized. When
CoolMOS
is switched off, the falling shape of the
driver is slowed down when reaching 2V to prevent an
overshoot below ground. Furthermore the driver circuit
is designed to eliminate cross conduction of the output
stage. At voltages below the undervoltage lockout
threshold V
VCCoff
the gate drive is active low.
t
I
Sense
I
Limit
t
Propagation Delay
I
Overshoot1
I
peak1
Signal1
Signal2
I
Overshoot2
I
peak2
dt
dV
dt
Sense
peak
1
≤
t
V
csth
V
OSC
Signal1
Signal2
V
Sense
Propagation Delay
max. Duty Cycle
off time
t
0,9
0,95
1
1,05
1,1
1,15
1,2
1,25
1,3
0
0,2
0,4
0,6
0,8
1
dV
Sense
1,2
1,4
1,6
1,8
2
with compensation
without compensation
dt
s
V
μ
S
V
V
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