參數(shù)資料
型號: ICE2A765P2
廠商: INFINEON TECHNOLOGIES AG
英文描述: Off-Line SMPS Current Mode Controller with integrated 650V/ 800V CoolMOS
中文描述: 離線式開關(guān)電源電流模式控制器,集成了?650V / 800V的的CoolMOS
文件頁數(shù): 14/35頁
文件大?。?/td> 1716K
代理商: ICE2A765P2
Version 2.0
14
11 Jun 2004
CoolSET-F2
Functional Description
the Current-Limit Comparator cannot switch off the
gate drive.
3.5.2
Propagation Delay Compensation
In case of overcurrent detection by I
Limit
the shut down
of CoolMOS is delayed due to the propagation delay
of the circuit. This delay causes an overshoot of the
peak current I
peak
which depends on the ratio of dI/dt of
the peak current (see Figure 17).
.
Figure 17
Current Limiting
The overshoot of Signal2 is bigger than of Signal1 due
to the steeper rising waveform.
A propagation delay compensation is integrated to
bound the overshoot dependent on dI/dt of the rising
primary current. That means the propagation delay
time between exceeding the current sense threshold
V
csth
and the switch off of CoolMOS is compensated
over temperature within a range of at least.
dI
peak
dt
dt
Figure 18
Dynamic Voltage Threshold V
csth
The propagation delay compensation is done by
means of a dynamic threshold voltage V
csth
(see Figure
18). In case of a steeper slope the switch off of the
driver is earlier to compensate the delay.
E.g. I
peak
= 0.5A with R
Sense
= 2. Without propagation
delay compensation the current sense threshold is set
to a static voltage level V
csth
=1V. A current ramp of
dI/dt = 0.4A/μs, that means dV
Sense
/dt = 0.8V/μs, and a
propagation delay time of i.e. t
Propagation Delay
=180ns
leads then to a I
peak
overshoot of 12%. By means of
propagation delay compensation the overshoot is only
about 2% (see Figure 19).
Figure 19
Overcurrent Shutdown
3.6
PWM-Latch
The oscillator clock output applies a set pulse to the
PWM-Latch when initiating CoolMOS conduction.
After setting the PWM-Latch can be reset by the PWM-
OP, the Soft-Start-Comparator, the Current-Limit-
Comparator, Comparator C3 or the Error-Latch of the
Protection Unit. In case of resetting the driver is shut
down immediately.
3.7
Driver
The driver-stage drives the gate of the CoolMOS and
is optimized to minimize EMI and to provide high circuit
efficiency. This is done by reducing the switch on slope
when reaching the CoolMOS threshold. This is
achieved by a slope control of the rising edge at the
driver’s output (see Figure 20) to the CoolMOS gate.
Thus the leading switch on spike is minimized. When
CoolMOS is switched off, the falling shape of the
driver is slowed down when reaching 2V to prevent an
overshoot below ground. Furthermore the driver circuit
is designed to eliminate cross conduction of the output
stage. At voltages below the undervoltage lockout
threshold V
VCCoff
the gate drive is active low.
t
I
Sense
I
Limit
t
Propagation Delay
I
Overshoot1
I
peak1
Signal2
Signal1
I
Overshoot2
I
peak2
0
R
Sense
------------
×
Sense
---------------
t
V
csth
V
OSC
Signal1
Signal2
V
Sense
max. Duty Cycle
off time
t
Propagation Delay
0.9
0.95
1
1.05
1.1
1.15
1.2
1.25
1.3
0
0.2
0.4
0.6
0.8
1
dV
Sense
1.2
1.4
1.6
1.8
2
with compensation
without compensation
dt
V
V/us
V
S
相關(guān)PDF資料
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