參數(shù)資料
型號(hào): ICD2061A
廠商: CYPRESS SEMICONDUCTOR CORP
元件分類: XO, clock
英文描述: Dual Programmable Graphics Clock Generator(雙路可編程圖形時(shí)鐘產(chǎn)生器)
中文描述: 120 MHz, VIDEO CLOCK GENERATOR, PDSO16
封裝: SOIC-16
文件頁(yè)數(shù): 1/15頁(yè)
文件大?。?/td> 197K
代理商: ICD2061A
Dual Programmable
Graphics Clock Generator
ICD2061A
Cypress Semiconductor Corporation
3901 North First Street
San Jose
CA 95134
June 1994 - Revised July 16, 1997
408-943-2600
Features
Second generation dual oscillator graphics clock gen-
erator
2 independent clock outputs from 390 KHz to 100 MHz
Individually programmable oscillators using a highly
reliable, Manchester-encoded, 21-bit serial data word
2-pin serial programming interface allows direct con-
nection to most graphics chip sets with no external
hardware required
2 advanced power-down capabilities
Three-state oscillator control disables outputs for test
purposes
Phase-locked loop oscillator input derived from single
14.318 MHz crystal
Sophisticated internal loop-filter requires no external
components or manufacturing “tweaks” as commonly
required with external filters
5V operation
Low-power, high-speed CMOS technology
Available in 16-pin SOIC package configuration
Functional Description
The ICD2061A Dual Programmable Graphics Clock Genera-
tor features a fully programmable set of clock oscillators which
can handle all frequency requirements of most graphics sys-
tems. The ICD2061A offers the selection ease of ROM-based
clock chips, while also offering the versatility of serially pro-
grammable frequency synthesizers. It features advanced
power-down capabilities, making it ideally suited for the porta-
ble computer market. The ICD2061A has extended frequency
range and improved voltage/temperature stability when com-
pared to first-generation frequency synthesizers.
The ICD2061A Dual Programmable Graphics Clock Genera-
tor offers two fully user-programmable phase-locked loops in
a single package. The outputs may be changed “on the fly” to
any desired frequency value between 390 KHz and 100 MHz.
The ICD2061A is ideally suited for any design where multiple
or varying frequencies are required, replacing more expensive
metal can oscillators.
Being able to change the output frequency dynamically adds
a whole new degree of freedom for the electrical engineer
which was previously unavailable with existing crystal oscilla-
tor devices. Some examples of the uses for this device in-
clude: laptop computers, in which slowing the speed of oper-
ation can mean less power consumption or speeding it up can
mean faster operation; graphics board dot clocks to allow dy-
namic synchronization with different brands of monitors or dis-
play formats; and on-board test strategies where the ability to
skew a system’s desired frequency (for example: ±10%) al-
lows worst case evaluations.
While primarily designed for the graphics subsystem market,
the programming versatility of the ICD2061A makes it ideal
wherever two variable, yet highly accurate clock sources are
required.
ICD2061A–1
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
S0/CLK
S1/DATA
AV
DD
OE
GND
XTALIN
XTALOUT
MCLKOUT
PWRDWN
INTCLK
INIT1
V
DD
INIT0
FEATCLK
ERROUT
VCLKOUT
SOIC
Top View
9
Pin Configuration
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