- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄360719 > IC43R32400 1M x 32 Bit x 4 Banks (128-MBIT) DDR SDRAM PDF資料下載
參數(shù)資料
| 型號(hào)： | IC43R32400 |
| 英文描述： | 1M x 32 Bit x 4 Banks (128-MBIT) DDR SDRAM |
| 中文描述： | 100萬× 32位× 4個(gè)銀行（128兆位）DDR SDRAM內(nèi)存 |
| 文件頁(yè)數(shù)： | 10/18頁(yè) |
| 文件大小： | 3877K |
| 代理商： | IC43R32400 |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)當(dāng)前第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)
IC43R32400
10
Integrated Circuit Solution Inc.
DDR003-0B 11/10/2004
D.C. Characteristics
(VDD = 2.5V +/
-
5%, TA = 0~70
°
C)
Parameter & Test Condition
Symbol 4 5 Unit
Max
OPERATING CURRENT :
One bank; Active-
Precharge; tRC=tRC(min); tCK=tCK(min); DQ,DM and
DQS inputs changing once per clock cycle; Address
and control inputs changing once every two clock
cycles.
OPERATING CURRENT :
One bank; Active-Read-
Precharge; BL=4; CL=4; tRCDRD=4*t
CK
; t
RC
=t
RC
(min);
t
CK
=t
CK
(min); lout=0mA; Address and control inputs
changing once per clock cycle
PRECHARGE POWER-DOWN STANDBY
CURRENT:
All banks idle; power-down mode; t
CK
=t
CK
(min); CKE=LOW
IDLE STANDLY CURRENT :
CKE = HIGH;
CS#=HIGH(DESELECT); All banks idle; t
CK
=t
CK
(min);
Address and control inputs changing once per clock
cycle; V
IN
=V
REF
for DQ, DQS and DM
IDD0 180 160 mA
IDD1 260 240 mA
IDD2P 45 40 mA
IDD2N 80 80 mA
IDD3P 45 40 mA
IDD3N 100 100 mA
IDD4R 440 420 mA
ACTIVE POWER-DOWN STANDBY CURRENT :
one bank active; power-down mode; CKE=LOW;
t
CK
=t
CK
(min)
ACTIVE STANDBY CURRENT :
CS#=HIGH;
CKE=HIGH; one bank active ; t
RC
=t
RC
(max);t
CK
=t
CK
(min);Address and control inputs changing once per
clock cycle; DQ,DQS,and DM inputs changing twice per
clock cycle
OPERATING CURRENT BURST READ :
BL=2;
READS; Continuous burst; one bank active; Address and
control inputs changing once per clock cycle; t
CK
=t
CK
(min); lout=0mA;50% of data changing on every transfer
OPERATING CURRENT BURST Write :
BL=2;
WRITES; Continuous Burst ;one bank active; address
and control inputs changing once per clock cycle;
t
CK
=t
CK
(min); DQ,DQS,and DM changing twice per clock
cycle; 50% of data changing on every transfer
AUTO REFRESH CURRENT :
t
RC
=t
RFC
(min);
t
CK
=t
CK
(min)
SELF REFRESH CURRENT:
Sell Refresh Mode ;
CKE<=0.2V;t
CK
=t
CK
(min)
BURST OPERATING CURRENT 4 bank
operation:
Four bank interleaving READs; BL=4;with
Auto Precharge; t
RC
=t
RC
(min); t
CK
=t
CK
(min); Address
and control inputschang only during Active, READ , or
WRITE command
Note:
1.Stress greater than those listed under " Absolute maximum Ratings" may cause permanent damage
of the device.
2.All voltages are referenced to Vss.
3.Power-up sequence is described in previous page.
IDD4W 300 270 mA
DD5 300 280 mA
IDD7 650 550 mA
IDD6 3 3 mA
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IC43R32400-4B | 1M x 32 Bit x 4 Banks (128-MBIT) DDR SDRAM |
| IC43R32400-4BG | 1M x 32 Bit x 4 Banks (128-MBIT) DDR SDRAM |
| IC43R32400-5B | 1M x 32 Bit x 4 Banks (128-MBIT) DDR SDRAM |
| IC43R32400-5BG | 1M x 32 Bit x 4 Banks (128-MBIT) DDR SDRAM |
| IC61C1024L-25JI | 128K x 8 HIGH-SPEED CMOS STATIC RAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IC43R32400-4B | 制造商:ICSI 制造商全稱:Integrated Circuit Solution Inc 功能描述:1M x 32 Bit x 4 Banks (128-MBIT) DDR SDRAM |
| IC43R32400-4BG | 制造商:ICSI 制造商全稱:Integrated Circuit Solution Inc 功能描述:1M x 32 Bit x 4 Banks (128-MBIT) DDR SDRAM |
| IC43R32400-5B | 制造商:ICSI 制造商全稱:Integrated Circuit Solution Inc 功能描述:1M x 32 Bit x 4 Banks (128-MBIT) DDR SDRAM |
| IC43R32400-5BG | 制造商:ICSI 制造商全稱:Integrated Circuit Solution Inc 功能描述:1M x 32 Bit x 4 Banks (128-MBIT) DDR SDRAM |
| IC440A | 制造商:Black Box Corporation 功能描述:CONNECTORS, IN-LINE |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。