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參數(shù)資料
| 型號： | IC42S32800L-7TG |
| 英文描述： | 2M x 32 Bit x 4 Banks (256-MBIT) SDRAM |
| 中文描述： | 200萬× 32位× 4個銀行（256兆）內(nèi)存 |
| 文件頁數(shù)： | 18/62頁 |
| 文件大?。?/td> | 879K |
| 代理商： | IC42S32800L-7TG |
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IC42S32800
IC42S32800L
18
Integrated Circuit Solution Inc.
DR046-0B 12/21/2004
Test Mode field (A8~A7)
These two bits are used to enter the test mode and must be programmed to “00”in normal operation.
This bit is used to select the burst write length.
A9
Write Burst Length
0
Burst
1
Single Bit
Write Burst Length (A9)
8
No-Operation command
(RAS#=”H”,CAS#=”H”,WE#=”H”)
The No-Operation command is used to perform a NOP to the SDRAM which is selected (CS#
is Low).This prevents unwanted commands from being registered during idle or wait states.
Burst Stop command
(RAS#=”H”,CAS#=”H”,WE#=”L”)
The Burst Stop command is used to terminate either fixed-length or full-page bursts.This
command is only effective in a read/write burst without the auto precharge function.The terminated
read burst ends after a delay equal to the CAS#latency (refer to the following figure).The
termination of a write burst is shown in the following figure.
9
Termination of a Burst Read Operation (Burst Length
> 4
,CAS#Latency =2,3)
Termination of a Burst Write Operation (Burst Length =X)
CLK
COMMAND
T0
T 1
T2
T3
T4
T5
T6
T7
T8
READ A
NOP
NOP
NOP
NOP
NOP
NOP
NOP
CAS# latency=2
tCK2,DQ’s
DOUT A0
DOUT A1
DOUT A2
DOUT A3
DOUT A0
DOUT A1
DOUT A2
DOUT A3
CAS# latency=3
tCK3,DQ’s
The Burst ends after a delay equal to the CAS# latency.
Burst Stop
CLK
COMMAN D
T0
T 1
T2
T3
T4
T5
T6
T7
T8
NOP
WRITE A
NOP
NOP
NOP
NOP
NOP
NOP
Burst Stop
CAS# latency=2,3
DQ’s
DIN A0
DIN A1
DIN A2
don’t care
Input Data for the Write is masked.
A8
0
0
1
A7
0
1
X
Test Mode
normal mode
Vendor Use Only
Vendor Use Only
相關(guān)PDF資料 |
PDF描述 |
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| IC42S32800L-7TI | 2M x 32 Bit x 4 Banks (256-MBIT) SDRAM |
| IC42S32800L-7TIG | 2M x 32 Bit x 4 Banks (256-MBIT) SDRAM |
| IC43R32400 | 1M x 32 Bit x 4 Banks (128-MBIT) DDR SDRAM |
| IC43R32400-4B | 1M x 32 Bit x 4 Banks (128-MBIT) DDR SDRAM |
| IC43R32400-4BG | 1M x 32 Bit x 4 Banks (128-MBIT) DDR SDRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IC42S32800L-7TI | 制造商:ICSI 制造商全稱:Integrated Circuit Solution Inc 功能描述:2M x 32 Bit x 4 Banks (256-MBIT) SDRAM |
| IC42S32800L-7TIG | 制造商:ICSI 制造商全稱:Integrated Circuit Solution Inc 功能描述:2M x 32 Bit x 4 Banks (256-MBIT) SDRAM |
| IC42S81600 | 制造商:ICSI 制造商全稱:Integrated Circuit Solution Inc 功能描述:4(2)M x 8(16) Bits x 4 Banks (128-MBIT) SYNCHRONOUS DYNAMIC RAM |
| IC42S81600-6T | 制造商:ICSI 制造商全稱:Integrated Circuit Solution Inc 功能描述:4(2)M x 8(16) Bits x 4 Banks (128-MBIT) SYNCHRONOUS DYNAMIC RAM |
| IC42S81600-6T(G) | 制造商:ICSI 制造商全稱:Integrated Circuit Solution Inc 功能描述:4(2)M x 8(16) Bits x 4 Banks (128-MBIT) SYNCHRONOUS DYNAMIC RAM |
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