參數(shù)資料
型號: IC42S32202-6BI
英文描述: 512K x 32 Bit x 4 Banks (64-MBIT) SDRAM
中文描述: 為512k × 32位× 4個銀行(64兆位)內(nèi)存
文件頁數(shù): 18/62頁
文件大?。?/td> 774K
代理商: IC42S32202-6BI
IC42S3220
2/
L
18
Integrated Circuit Solution Inc.
DR0
42
-0C 0
8
/
1
7/2004
Test Mode field (A8~A7)
These two bits are used to enter the test mode and must be programmed to “00”in normal operation.
This bit is used to select the burst write length.
A9
Write Burst Length
0
Burst
1
Single Bit
Write Burst Length (A9)
8
No-Operation command
(RAS#=”H”,CAS#=”H”,WE#=”H”)
The No-Operation command is used to perform a NOP to the SDRAM which is selected (CS#
is Low).This prevents unwanted commands from being registered during idle or wait states.
Burst Stop command
(RAS#=”H”,CAS#=”H”,WE#=”L”)
The Burst Stop command is used to terminate either fixed-length or full-page bursts.This
command is only effective in a read/write burst without the auto precharge function.The terminated
read burst ends after a delay equal to the CAS#latency (refer to the following figure).The
termination of a write burst is shown in the following figure.
9
Termination of a Burst Read Operation (Burst Length
> 4
,CAS#Latency =2,3)
Termination of a Burst Write Operation (Burst Length =X)
CLK
COMMAND
T0
T 1
T2
T3
T4
T5
T6
T7
T
8
READ A
NOP
NOP
NOP
NOP
NOP
NOP
NOP
CAS# latency=2
tCK2,DQ’s
DOUT A0
DOUT A1
DOUT A2
DOUT A
3
DOUT A0
DOUT A1
DOUT A2
DOUT A
3
CAS# latency=3
tCK3,DQ’s
The Burst ends after a delay equal to the CAS# latency.
Burst Stop
CLK
COMMAN D
T0
T 1
T2
T3
T4
T5
T6
T7
T
8
NOP
WRITE A
NOP
NOP
NOP
NOP
NOP
NOP
Burst Stop
CAS# latency=2,3
DQ’s
DIN A0
DIN A1
DIN A2
don’t care
Input Data for the Write is masked.
A8
0
0
1
A7
0
1
X
Test Mode
normal mode
Vendor Use Only
Vendor Use Only
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