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參數(shù)資料
| 型號(hào)： | IC42S16400A-6TI |
| 英文描述： | 1M x 16Bit x 4 Banks (64-MBIT) SDRAM |
| 中文描述： | 100萬× 16 × 4銀行（64兆位）內(nèi)存 |
| 文件頁(yè)數(shù)： | 6/67頁(yè) |
| 文件大?。?/td> | 1072K |
| 代理商： | IC42S16400A-6TI |
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IC42S16400A
6
Integrated Circuit Solution Inc.
DR039-0A 02/19/2004
DC ELECTRICAL CHARACTERISTICS
(At T
A
= 0 ~ 70°C, V
DD
= V
DDQ
= 3.3 ± 0.3V, V
SS
= V
SSQ
= 0V , unless otherwise note
d
)
Symbol Parameter
Test Condition
Speed
Min.
Max.
Unit
I
CC
1
(1)
Operating Current
One Bank
active
,
Burst Length=1
t
RC
= t
RC
(min.)
t
CLK
= t
CLK
(min.)
CKE < V
IL
(
MAX
)
CAS
latency = 3 -6(42S16400A)
—
—
95
85
mA
mA
-7(42S16400A)
I
CC
2P
Precharge Standby Current
(In Power-Down Mode)
t
CK
= 15 ns
-6
-7
-6
-7
-6
-7
-6
-7
-6
-7
-6
-7
-6
-7
-6
-7
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
2
2
1
1
20
20
15
15
7
7
5
5
30
30
25
25
130
100
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
I
CC
2PS
CKE < V
IL
(
MAX
)
CLK < V
IL
(
MAX
)
I
CC
2N
(2)
Precharge Standby Current
(In Non Power-Down Mode)
CS > V
CC
-0.2V
CKE > V
IH
(
MIN
)
CS > V
CC
-0.2V
CKE > V
IH
(
MIN
)
All input signals are stable.
CKE < V
IL
(
MAX
)
t
CK
= 10 ns
t
CK
= 15 ns
I
CC
2NS
CKE < V
IL
(
MAX
)
I
CC
3P
Active Standby Current
(In Power-Down Mode)
I
CC
3PS
CKE < V
IL
(
MAX
)
CLK < V
IL
(
MAX
)
I
CC
3N
(2)
Active Standby Current
(In Non Power-Down Mode)
CS > V
CC
-0.2V
CKE > V
IH
(
MIN
)
CS > V
CC
-0.2V
CKE > V
IH
(
MIN
)
All input signals are stable.
All Banks active
CAS
latency = 3 -6(42S16400A)
Burst Length=1
t
CK
= t
CK
(
MIN
)
t
RC
= t
RC
(
MIN
)
t
CLK
= t
CLK
(
MIN
)
CKE < 0.2V
t
CK
= 15 ns
I
CC
3NS
CKE < V
IL
(
MAX
)
I
CC
4
Operating Current
(In Burst Mode)
-7(42S16400A)
I
CC
5
Auto-Refresh Current
-6
-7
-6
-7
—
—
—
—
–5
150
130
1
1
5
mA
mA
mA
mA
μA
I
CC
6
(3, 4)
Self-Refresh Current
I
IL
Input Leakage Current
(Inputs)
0V < V
IN
< V
DD
(
MAX
)
Pins not under test = 0V
I
OL
Output Leakage Current
(I/O pins)
High Level Output Voltage
Low Level Output Voltage
Output is disabled
DQ# in H - Z.,
0V < V
OUT
< V
DD
(
MAX
)
I
OUT
= –2 mA
I
OUT
= +2 mA
–5
5
μA
V
OH
V
OL
2.4
—
—
0.4
V
V
Notes:
1. I
CC
(max) is specified at the output open condition.
2. Input signals are changed one time during 30ns.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IC42S16400A-6TIG | 1M x 16Bit x 4 Banks (64-MBIT) SDRAM |
| IC42S16400A-7BG | 1M x 16Bit x 4 Banks (64-MBIT) SDRAM |
| IC42S16400A-7BIG | 1M x 16Bit x 4 Banks (64-MBIT) SDRAM |
| IC42S16400A-7T | 1M x 16Bit x 4 Banks (64-MBIT) SDRAM |
| IC42S16400A-7TG | 1M x 16Bit x 4 Banks (64-MBIT) SDRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IC42S16400A-6TIG | 制造商:ICSI 制造商全稱:Integrated Circuit Solution Inc 功能描述:1M x 16Bit x 4 Banks (64-MBIT) SDRAM |
| IC42S16400A-7BG | 制造商:ICSI 制造商全稱:Integrated Circuit Solution Inc 功能描述:1M x 16Bit x 4 Banks (64-MBIT) SDRAM |
| IC42S16400A-7BIG | 制造商:ICSI 制造商全稱:Integrated Circuit Solution Inc 功能描述:1M x 16Bit x 4 Banks (64-MBIT) SDRAM |
| IC42S16400A-7T | 制造商:ICSI 制造商全稱:Integrated Circuit Solution Inc 功能描述:1M x 16Bit x 4 Banks (64-MBIT) SDRAM |
| IC42S16400A-7TG | 制造商:ICSI 制造商全稱:Integrated Circuit Solution Inc 功能描述:1M x 16Bit x 4 Banks (64-MBIT) SDRAM |
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