- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄360716 > IC42S16100-5TIG 512K x 16 Bits x 2 Banks (16-MBIT) SYNCHRONOUS DYNAMIC RAM PDF資料下載
參數(shù)資料
| 型號： | IC42S16100-5TIG |
| 英文描述： | 512K x 16 Bits x 2 Banks (16-MBIT) SYNCHRONOUS DYNAMIC RAM |
| 中文描述： | 為512k × 16位× 2組（16兆）同步動態(tài)RAM |
| 文件頁數(shù)： | 16/78頁 |
| 文件大?。?/td> | 789K |
| 代理商： | IC42S16100-5TIG |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁當(dāng)前第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁
IC42S16100
16
Integrated Circuit Solution Inc.
DR024-0D 06/25/2004
OPERATION COMMAND TABLE
(1,2)
Current State
Command
Operation
CS
RAS CAS
WE
A11
A10 A9-A0
Write Recovery
With Auto-
Precharge
DESL
NOP
BST
READ/READA
WRIT/WRITA
ACT
PRE/PALL
REF/SELF
MRS
DESL
NOP
BST
READ/READA
WRIT/WRITA
ACT
PRE/PALL
REF/SELF
MRS
DESL
NOP
BST
READ/READA
WRIT/WRITA
ACT
PRE/PALL
REF/SELF
MRS
No Operation, Idle State After t
DAL
Has Elapsed
No Operation, Idle State After t
DAL
Has Elapsed
No Operation, Idle State After t
DAL
Has Elapsed
Illegal
(10)
Illegal
(10)
Illegal
(10)
Illegal
(10)
Illegal
Illegal
No Operation, Idle State After t
RP
Has Elapsed
No Operation, Idle State After t
RP
Has Elapsed
No Operation, Idle State After t
RP
Has Elapsed
Illegal
Illegal
Illegal
Illegal
Illegal
Illegal
No Operation, Idle State After t
MCD
Has Elapsed
No Operation, Idle State After t
MCD
Has Elapsed
No Operation, Idle State After t
MCD
Has Elapsed
Illegal
Illegal
Illegal
Illegal
Illegal
Illegal
H
L
L
L
L
L
L
L
L
H
L
L
L
L
L
L
L
L
H
L
L
L
L
L
L
L
L
X
H
H
H
H
L
L
L
L
X
H
H
H
H
L
L
L
L
X
H
H
H
H
L
L
L
L
X
H
H
L
L
H
H
L
L
X
H
H
L
L
H
H
L
L
X
H
H
L
L
H
H
L
L
X
H
L
H
L
H
L
H
L
X
H
L
H
L
H
L
H
L
X
H
L
H
L
H
L
H
L
X
X
X
V
V
V
V
X
X
X
X
V
V
V
V
X
X
X
X
V
(18)
V
(18)
V
(18)
X
X
OP CODE
X
X
X
V
V
V
V
X
OP CODE
X
X
X
V
V
V
V
X
OP CODE
Refresh
X
X
X
V
V
V
V
X
X
X
X
V
(18)
V
(18)
V
(18)
X
X
Mode Register
Set
X
X
X
V
V
V
V
X
X
X
X
V
(18)
V
(18)
V
(18)
X
X
Notes:
1.
2.
3.
4.
5.
6.
7.
8.
9.
10. This is possible depending on the state of the bank selected by the A11 pin.
11. Time to switch internal busses is required.
12. The IC42S16100 can be switched to power-down mode by dropping the CKE pin LOW when both banks in the idle state.
Input pins other than CKE are ignored at this time.
13. The IC42S16100 can be switched to self-refresh mode by dropping the CKE pin LOW when both banks in the idle state.
Input pins other than CKE are ignored at this time.
14. Possible if t
RRD
is satisfied.
15. Illegal if t
RAS
is not satisfied.
16. The conditions for burst interruption must be observed. Also note that the IC42S16100 will enter the precharged state
immediately after the burst operation completes if auto-precharge is selected.
17. Command input becomes possible after the period t
RCD
has elapsed. Also note that the IC42S16100 will enter the
precharged state immediately after the burst operation completes if auto-precharge is selected.
18. A8,A9 = don't care.
H: HIGH level input, L: LOW level input, X: HIGH or LOW level input, V: Valid data input
All input signals are latched on the rising edge of the CLK signal.
Both banks must be placed in the inactive (idle) state in advance.
The state of the A0 to A11 pins is loaded into the mode register as an OP code.
The row address is generated automatically internally at this time. The I/O pin and the address pin data is ignored.
During a self-refresh operation, all pin data (states) other than CKE is ignored.
The selected bank must be placed in the inactive (idle) state in advance.
The selected bank must be placed in the active state in advance.
This command is valid only when the burst length set to full page.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IC42S16100-6T | 512K x 16 Bits x 2 Banks (16-MBIT) SYNCHRONOUS DYNAMIC RAM |
| IC42S16100-6TG | 512K x 16 Bits x 2 Banks (16-MBIT) SYNCHRONOUS DYNAMIC RAM |
| IC42S16100-6TI | 512K x 16 Bits x 2 Banks (16-MBIT) SYNCHRONOUS DYNAMIC RAM |
| IC42S16100-6TIG | 512K x 16 Bits x 2 Banks (16-MBIT) SYNCHRONOUS DYNAMIC RAM |
| IC42S16100-7T | 512K x 16 Bits x 2 Banks (16-MBIT) SYNCHRONOUS DYNAMIC RAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IC42S16100-6T | 制造商:ICSI 制造商全稱:Integrated Circuit Solution Inc 功能描述:512K x 16 Bits x 2 Banks (16-MBIT) SYNCHRONOUS DYNAMIC RAM |
| IC42S16100-6TG | 制造商:ICSI 制造商全稱:Integrated Circuit Solution Inc 功能描述:512K x 16 Bits x 2 Banks (16-MBIT) SYNCHRONOUS DYNAMIC RAM |
| IC42S16100-6TI | 制造商:ICSI 制造商全稱:Integrated Circuit Solution Inc 功能描述:512K x 16 Bits x 2 Banks (16-MBIT) SYNCHRONOUS DYNAMIC RAM |
| IC42S16100-6TIG | 制造商:ICSI 制造商全稱:Integrated Circuit Solution Inc 功能描述:512K x 16 Bits x 2 Banks (16-MBIT) SYNCHRONOUS DYNAMIC RAM |
| IC42S16100-7T | 制造商:ICSI 制造商全稱:Integrated Circuit Solution Inc 功能描述:512K x 16 Bits x 2 Banks (16-MBIT) SYNCHRONOUS DYNAMIC RAM |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。