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參數(shù)資料
| 型號(hào)： | IC41UV4105-70T |
| 英文描述： | 1Mx4 bit Dynamic RAM with Fast Page Mode |
| 中文描述： | 1Mx4位動(dòng)態(tài)RAM的快速頁(yè)面模式 |
| 文件頁(yè)數(shù)： | 2/17頁(yè) |
| 文件大小： | 193K |
| 代理商： | IC41UV4105-70T |
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FEATURES
Fast Page Mode Access Cycle
TTL compatible inputs and outputs
Refresh Interval:
-- 1,024 cycles/16 ms
Refresh Mode:
RAS
-Only,
CAS
-before-
RAS
(CBR), and Hidden
JEDEC standard pinout
Single power supply:
2.6V
±
0.2V
DESCRIPTION
The
ICSI
4105 Series is a 1,048,576 x 4-bit high-performance
CMOS Dynamic Random Access Memory. The Fast Page
Mode allows 1,024 random accesses within a single row with
access cycle time as short as 20 ns per 4-bit word.
These features make the 4105 Series ideally suited for high-
bandwidth graphics, digital signal processing, high-performance
computing systems, and peripheral applications.
The 4105 Series is packaged in a 20-pin 300mil SOJ and a 20
pin TSOP-2
IC41UV4105
1M x 4 (4
MBIT) DYNAMIC RAM
WITH FAST PAGE MODE
Integrated Circuit Solution Inc.
DR020-0A 08/09/2001
2
KEY TIMING PARAMETERS
Parameter
RAS
Access Time (t
RAC
)
CAS
Access Time (t
CAC
)
Column Address Access Time (t
AA
)
Fast Page Mode Cycle Time (t
PC
)
Read/Write Cycle Time (t
RC
)
-
50
50
14
25
20
90
-70
-
100 Unit
70
100
20
25
35
50
45
60
130
180
ns
ns
ns
ns
ns
ICSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors
which may appear in this publication. Copyright 2000, Integrated Circuit Solution Inc.
PIN DESCRIPTIONS
A0-A9
Address Inputs
I/O0-3
Data Inputs/Outputs
WE
Write Enable
OE
Output Enable
RAS
Row Address Strobe
CAS
Column Address Strobe
Vcc
Power
GND
Ground
PIN CONFIGURATION
20 (26) Pin SOJ, TSOP
-
2
1
2
3
4
5
9
10
11
12
13
26
25
24
23
22
18
17
16
15
14
I/O0
I/O1
WE
RAS
A9
A0
A1
A2
A3
VCC
GND
I/O3
I/O2
CAS
OE
A8
A7
A6
A5
A4
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