參數(shù)資料
型號(hào): IC41LV44002ASL-60T
英文描述: 4M x 4 (16-MBIT) DYNAMIC RAM WITH EDO PAGE MODE
中文描述: 4米× 4(16兆)動(dòng)態(tài)與江戶頁(yè)面模式內(nèi)存
文件頁(yè)數(shù): 3/20頁(yè)
文件大?。?/td> 297K
代理商: IC41LV44002ASL-60T
Integrated Circuit Solution Inc.
DR026-0A 09/04/2001
3
IC41C44002A/IC41C44002AS(L)
IC41LV44002A/IC41LV44002AS(L)
FUNCTIONAL BLOCK DIAGRAM
OE
WE
CAS
CAS
WE
O
DATA I/O BUS
COLUMN DECODERS
SENSE AMPLIFIERS
MEMORY ARRAY
4,194,304 x 4
R
D
CAS
CONTROL
LOGIC
WE
CONTROL
LOGICS
OE
CONTROL
LOGIC
I/O0-I/O3
RAS
R
A0-A10
RAS
CLOCK
GENERATOR
REFRESH
COUNTER
ADDRESS
BUFFERS
TRUTH TABLE
Function
Standby
Read
Write: Word (Early Write)
Read-Write
EDO Page-Mode Read 1st Cycle:
RAS
H
L
L
L
L
L
L
L
L
L
L
H
L
L
H
L
L
H
L
CAS
H
L
L
L
H
L
H
L
H
L
H
L
H
L
H
L
L
L
H
L
WE
X
H
L
H
L
H
H
L
L
H
L
H
L
H
L
X
H
OE
X
L
X
L
H
L
L
X
X
L
H
L
H
L
X
X
X
Address t
R
/t
C
X
ROW/COL
ROW/COL
ROW/COL
ROW/COL
NA/COL
ROW/COL
NA/COL
ROW/COL
NA/COL
ROW/COL
ROW/COL
ROW/NA
X
I/O
High-Z
D
OUT
D
IN
D
OUT
, D
IN
D
OUT
D
OUT
D
IN
D
IN
D
OUT
, D
IN
D
OUT
, D
IN
D
OUT
D
IN
High-Z
High-Z
2nd Cycle:
1st Cycle:
2nd Cycle:
1st Cycle:
2nd Cycle:
Read
Write
(1)
EDO Page-Mode Write
EDO Page-Mode
Read-Write
Hidden Refresh
RAS
-Only Refresh
CBR Refresh
Note:
1.
EARLY WRITE only.
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