參數(shù)資料
型號(hào)： ML9044-XXACVWA
廠商： OKI ELECTRIC INDUSTRY CO LTD
元件分類： 顯示控制器
英文描述： 17 X 120 DOTS DOT MAT LCD DRVR AND DSPL CTLR, UUC189
封裝： 10.62 X 2.55 MM, GOLD BUMP, DIE-189
文件頁(yè)數(shù)： 31/60頁(yè)
文件大?。?/td> 579K
代理商： ML9044-XXACVWA
PEDL9044-03
1Semiconductor
ML9044-xxA/xxB
37/60
7) CGRAM Address Setting
RS1
1
RS0
0
R/
W
0
DB7
0
DB6
1
DB5
C5
DB4
C4
DB3
C3
DB2
C2
DB1
C1
DB0
C0
Instruction code:
This instruction sets the character data corresponding to the CGRAM address represented by the bits C
5 to C0
(binary).
The CGRAM addresses are valid until DDRAM or ABRAM addresses are set.
The CPU writes or reads character patterns starting from the one represented by the CGRAM address bits C
5 to
C
0 set in the instruction code at that time.
Note: The execution time of this instruction is 37
s at an oscillation frequency (OSC) of 270 kHz.
8) DDRAM Address Setting
RS1
1
RS0
0
R/
W
0
DB7
1
DB6
D6
DB5
D5
DB4
D4
DB3
D3
DB2
D2
DB1
D1
DB0
D0
Instruction code:
This instruction sets the character data corresponding to the DDRAM address represented by the bits D
6 to D0
(binary).
The DDRAM addresses are valid until CGRAM or ABRAM addresses are set.
The CPU writes or reads character patterns starting from the one represented by the DDRAM address bits D
6 to
D
0 set in the instruction code at that time.
In the 1-line mode (the “N” bit is “1”), the DDRAM address represented by bits D
6 to D0 (binary) should be in
the range “00” to “4F” in hexadecimal.
In the 2-line mode (the “N” bit is “2”), the DDRAM address represented by bits D
6 to D0 (binary) should be in
the range “00” to “27” or “40” to “67” in hexadecimal.
If an address other than above is input, the ML9044 cannot properly write a character code in or read it from the
DDRAM.
Note: The execution time of this instruction is 37
s at an oscillation frequency (OSC) of 270 kHz.
9) DDRAM/ABRAM/CGRAM Data Write
RS1
1
RS0
1
R/
W
0
DB7
E7
DB6
E6
DB5
E5
DB4
E4
DB3
E3
DB2
E2
DB1
E1
DB0
E0
Instruction code:
This instruction writes data represented by bits E
7 to E0 (binary) to DDRAM, ABRAM or CGRAM.
After data is written, the cursor, blink or display shifts according to the Cursor/Display Shift instruction (see
5)).
Note: The execution time of this instruction is 37
s at an oscillation frequency (OSC) of 270 kHz.
相關(guān)PDF資料
PDF描述
ML9044-XXBCVWA 17 X 120 DOTS DOT MAT LCD DRVR AND DSPL CTLR, UUC175
ML9044A-XXACVWA 17 X 120 DOTS DOT MAT LCD DRVR AND DSPL CTLR, UUC189
ML9203-01GA 16 X 35 DOTS FLUORESCENT DSPL CTRL, PQFP100
ML9206-XXGS-BK 16 X 37 DOTS FLUORESCENT DSPL CTRL, PQFP64
ML9206-XXGS-K 16 X 37 DOTS FLUORESCENT DSPL CTRL, PDSO64
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