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參數(shù)資料
| 型號(hào)： | IBM42F12SNNAA20 |
| 廠商： | IBM Microeletronics |
| 英文描述： | SFF-1063/1250N-SW PTH Serial Optical Transceiver(SFF-1063/1250N-SW PTH串行光纖收發(fā)器) |
| 中文描述： | SFF-1063/1250N-SW普通話系列光收發(fā)器（SFF-1063/1250N-SW普通話串行光纖收發(fā)器） |
| 文件頁數(shù)： | 2/7頁 |
| 文件大?。?/td> | 465K |
| 代理商： | IBM42F12SNNAA20 |
Application Note
SFF-1063/1250N-SW PTH Serial Optical Transceiver Design & Layout Guide
Page 2
optxcvr.fm
July 2000
Transmit/Receive Interface Impedance
Unlike the IBM GBIC, the SFF transceiver
’
s high
speed transmit (Tx_DAT) and receive (Rx_DAT)
data lines have a characteristic line-to-line imped-
ance of 100 ohms and a line-to-ground impedance
of 50 ohms (GBIC and 1x9 transceiver devices have
line-to-line and line-to-ground impedances of 150
and 75 ohms, respectively).
Physical Size
The transceiver occupies approximately half the vol-
ume of GBIC devices, making it possible to space
optical fiber cable connections at about half the hori-
zontal distance required for GBIC devices.
EMI/EMC/ESD
Data Paths
Because data rates on the lines to and from the
SERDES module are near 1 GHz, the
“
fundamental
”
is approximately 0.5 GHz and includes both higher
order harmonics and lower frequency
“
data noise.
”
For best eye diagram characteristics, the transmit
and receive data lines must make fast 1-0 and 0-1
transitions. Therefore, a somewhat rich array of fre-
quencies is present in these lines. To reduce
crosstalk, susceptibility, and radiation in high speed
data lines, consider the following design
approaches:
1. Keep data lines as short as possible. When lines
approach 0.05 wavelength at 0.5 GHz (approxi-
mately 0.79in/2cm), serious consideration
should be given to matching impedances with
PC board stripline or microstrip transmission
lines at 100 ohms line-to-line or 50 ohms line-to-
ground plane (See
Appendix A: Stripline Trans-
mission Lines
on page 6).
2. When transmission lines are not used, it is still
important to terminate at the SERDES end with
100-ohm and 50-ohm equivalent impedances.
Transmit and receive impedances of internal
SERDES circuits must be considered when
determining termination resistance.
3. Keep differential pairs parallel, closely spaced,
and the same length. Avoid sharp corners in the
path.Separate the input data line pairs from the
output data line pairs as much as possible and
route them above signal ground planes.
4. Particular care must be taken to space other wir-
ing as far as practicable from data lines. Wiring
traversing these lines should cross at right
angles on the opposite side of the ground plane.
5. To reduce reflections and radiation, maintain
uniform data line land widths. For example,
avoid abrupt width discontinuities when con-
necting data lines to I/O connectors. Use grad-
ual line width increases and decreases
whenever possible.
Figure 1: Pinout
(Bottom View)
Pin Description
Pin
Name
Type
1
Rx Ground
Logic Ground
2
Rx Power
Power
3
Rx_SD+
Status Output
4
Rx_DAT-
Signal Output
5
Rx_DAT+
Signal Output
6
Tx Power
Power
7
Tx Ground
Logic Ground
8
Tx_Disable+
Control Input
9
Tx_DAT+
Signal Input
10
Tx_DAT-
Signal Input
CA
Chassis Ground
Chassis Ground
CB
Chassis Ground
Chassis Ground
SC
Logic Ground
Logic Ground
SD
Logic Ground
Logic Ground
SE
Logic Ground
Logic Ground
SF
Logic Ground
Logic Ground
1 2 3 4 5
10 9 8 7 6
CA
CB
SC
SF
SE
SD
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