參數(shù)資料
型號(hào)： IBM25PPC750FX-FB0533T
元件分類： 微控制器/微處理器
英文描述： 32-BIT, 700 MHz, RISC PROCESSOR, CBGA292
封裝： 21 X 21 MM, 1 MM PITCH, CERAMIC, BGA-292
文件頁(yè)數(shù)： 47/62頁(yè)
文件大?。?/td> 452K
代理商： IBM25PPC750FX-FB0533T
DD 2.X
Preliminary
PowerPC 750FX RISC Microprocessor
Body_750FX_DS_DD2.X.fm.2.0
June 9, 2003
5. System Design Information
Page 49 of 63
5.6 64 or 32-Bit Data Bus Mode
This mode selection varies for different design revision (DD) levels. For the 750FX DD2.X, mode setting is
determined by the state of the mode signal, TLBISYNC, at the transition of HRESET from low to high. If TLBI-
SYNC is high when HRESET transitions from active to inactive, 64-bit mode is selected. If TLBISYNC is low
when HRESET transitions from active to inactive, 32-bit mode is selected.
Special Note: (Reduced pin out mode) To transition from a previous processor with reduced pin out mode,
drive TLBISYNC appropriately, leave the DP(0..7) and AP(0..3) pins floating, and disable par-
ity checking. The 750FX does not have APE and DPE pins.
5.7 IIO Voltage Mode Selection
Selection between 1.8V, 2.5V, or 3.3V I/O modes is accomplished by using the BVSEL and L1_TSTCLK
pins:
If BVSEL = 1 and L1_TSTCLK = 0, then the 3.3V mode is enabled.
If BVSEL = 1 and L1_TSTCLK = 1, then the 2.5V mode is enabled.
If BVSEL = 0 and L1_TSTCLK = 1, then the 1.8V mode is enabled.
Note: Do not set BVSEL = 0 and L1_TSTCLK = 0 since it yields an INVALID MODE.
5.8 Thermal Management
This section provides thermal management information for the CBGA package for air cooled applications.
Proper thermal control design is primarily dependent upon the system-level design; that is, the heat sink, air
flow, and the thermal interface material. To reduce the die-junction temperature, heat sinks may be attached
to the package by several methods: adhesive, spring clip to holes in the printed-circuit board or package,
In general, a heat sink is required for all 750FX applications.
A design example is included in this section.
5.8.1 Heat Sink Selection Example
For preliminary heat sink sizing, the die-junction temperature can be expressed as follows:
Table 5-7. Summary of Mode Select
Mode
750FX (DD2.x)
32-bit mode
Sample TLBISYNC to select
HIGH = 64-bit mode
LOW = 32-bit mode
I/O mode selection
3.3V +/- 165mV (BVSEL = 1, L1_TSTCLK = 0) or
2.5V +/- 125mV (BVSEL = 1, L1_TSTCLK = 1) or
1.8V +/- 100mV (BVSEL = 0, L1_TSTCLK = 1)
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