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參數(shù)資料
| 型號： | IBM25PPC405GPR3BB400Z |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, 400 MHz, RISC PROCESSOR, PBGA456 |
| 封裝： | 35 X 35 MM, ENHANCED, PLASTIC, BGA-456 |
| 文件頁數(shù)： | 1/58頁 |
| 文件大?。?/td> | 1264K |
| 代理商： | IBM25PPC405GPR3BB400Z |
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3/14/03
Preliminary
PowerPC 405GPr Embedded Processor Data Sheet
Page 1 of 58
Features
IBM PowerPC 405 32-bit RISC processor core
operating up to 400MHz with 16KB I- and
D-caches
PC-133 synchronous DRAM (SDRAM) interface
- 32-bit interface for non-ECC applications
- 40-bit interface serves 32 bits of data plus 8
check bits for ECC applications
4 KB on-chip memory (OCM)
External peripheral bus
- Flash ROM/Boot ROM interface
- Direct support for 8-, 16-, or 32-bit SRAM
and external peripherals
- Up to eight devices
- External Mastering supported
DMA support for external peripherals, internal
UART and memory
- Scatter-gather chaining supported
- Four channels
PCI Revision 2.2 compliant interface (32-bit, up
to 66 MHz)
- Synchronous or asynchronous PCI Bus
interface
- Internal or external PCI Bus Arbiter
Ethernet 10/100 Mbps (full-duplex) support with
media independent interface (MII)
Programmable interrupt controller supports 13
external and 19 internal edge triggered or level-
sensitive interrupts
Programmable timers
Two serial ports (16550 compatible UART)
One IIC interface
General purpose I/O (GPIO) available
Supports JTAG for board level testing
Internal processor local Bus (PLB) runs at
SDRAM interface frequency
Supports PowerPC processor boot from PCI
memory
Unique software-accessible 64-bit chip ID
number (ECID).
Description
Designed specifically to address embedded
applications, the PowerPC 405GPr (PPC405GPr)
provides a high-performance, low-power solution
that interfaces to a wide range of peripherals by
incorporating on-chip power management features
and lower power dissipation requirements.
This chip contains a high-performance RISC
processor core, SDRAM controller, PCI bus
interface, Ethernet interface, control for external
ROM and peripherals, DMA with scatter-gather
support, serial ports, IIC interface, and general
purpose I/O.
Technology: IBM CMOS SA-27E, 0.18
m
(0.11
m L
eff)
Package: 456-ball (35mm or 27mm) enhanced
plastic ball grid array (E-PBGA)
Power (typical): 0.72W at 266MHz
While the information contained herein is believed to be accurate, such information is preliminary, and should not be
relied upon for accuracy or completeness, and no representations or warranties of accuracy or completeness are made.
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