參數(shù)資料
型號(hào): IBM11M4730CB
廠商: IBM Microeletronics
英文描述: 4M x 72 DRAM Module(4M x 72 動(dòng)態(tài)RAM模塊)
中文描述: 4米× 72內(nèi)存(4米× 72動(dòng)態(tài)內(nèi)存模塊)
文件頁數(shù): 1/27頁
文件大小: 500K
代理商: IBM11M4730CB
IBM11M4730CH IBM11M4730CB
IBM11M4730CF
4M x 72 DRAM Module
64G1557.E20999D
Revised 4/98
IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
Page 1 of 27
Features
168-Pin JEDEC-Standard 8-Byte Dual In-Line
Memory Module
4Mx72 Fast Page Mode DIMM
Performance:
All inputs and outputs are LVTTL (3.3V) or TTL
(5.0V) compatible
Single 3.3V
±
0.3V or 5.0V
±
0.5V power supply
Gold contacts
Optimized for ECC applications
System Performance Benefits:
- Buffered inputs (except RAS, Data)
- Reduced noise (32 V
SS
/V
CC
pins)
- 4-Byte Interleave enabled
- Buffered PDs
Fast Page Mode, Read-Modify-Write Cycles
Refresh Modes: RAS-Only, CBR, and Hidden
Refresh
4096 refresh cycles distributed across 64ms
12/10 addressing (Row/Column)
Card sizes:
- 5.25" x 1.0" x 0.354" (SOJ)
- 5.25" x 1.0" x 0.157" (TSOP)
DRAM
S
in SOJ or TSOP Packages
Description
IBM11M4730CB, IBM11M4730CF, and
IBM11M4730CH are industry standard 168-pin
8-byte Dual In-Line Memory Modules (DIMMs) orga-
nized as a 4Mx72 high-speed memory arrays for
ECC applications. These DIMMs use 18 4Mx4
DRAMs in SOJ or TSOP packages.
Improved system performance is provided by the
on-DIMM buffering of selected input signals. The
specified timings include all buffer, net and skew
delays, which simplifies the memory subsystem
design analysis. The data and
RAS
signals are not
buffered, which preserves the DRAM access specifi-
cation of 60ns.
Presence Detect (PD) and Identification Detect (ID)
bits provide information about the DIMM density,
addressing, performance and features. PD bits can
be dotted at the system level and activated for each
DIMM position using the PD enable (PDE) signal. ID
bits also allow detection of card features, and may
be dot-or’d at the system level to provide information
for the entire DIMM bank. For example, the system
will determine that ECC DIMMs are installed if PD8
is low (0). ID0 need not be sensed since both x72
and x80 ECC DIMMs will function in a x72 bank.
All IBM 168-pin DIMMs provide a high-performance,
flexible 8-byte interface in a 5.25" long space-saving
footprint. Related products are the x64 non-parity
DIMMs and the ECC DIMMs (5V and 3.3V).
Card Outline 3.3V
-60
t
RAC
RAS Access Time
60ns
t
CAC
CAS Access Time
20ns
t
AA
Access Time From Address
35ns
t
RC
Cycle Time
110ns
t
PC
Fast Page Mode Cycle Time
40ns
1
85
10
94
11
95
40
124
41
125
84
168
(Front)
(Back)
See Detail A
for 5.0V Version
Detail A
IBM11M1730BB1M x 72 E10/10, 3.3V, Au.
Discontinued (9/98 - last order; 3/99 last ship)
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