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參數(shù)資料
| 型號： | IA2910A |
| 廠商： | Innovasic Semiconductor |
| 英文描述： | GT 54C 54#16 SKT RECP |
| 中文描述： | 微程序控制器 |
| 文件頁數(shù)： | 12/19頁 |
| 文件大?。?/td> | 162K |
| 代理商： | IA2910A |
Page 12 of 19
I
A2910A
Microprogram Controller
Preliminary
Data Sheet
Copyright
1999, InnovASIC Inc.
Customer SpecficIC Soutions
Instruction 15
TWB, THREE-WAY-BRANCH, is the most complex. It provides for testing for
both a data-dependent condition and the counter during one microinstruction and provides for
selecting among one of three microinstruction addresses as the next microinstruction to be
performed. Like instruction 8, a previous instruction will have loaded a count into the
register/counter while pushing a microbranch address onto the stack. Instruction 15 performs a
decrement-and-branch-until-zero function similar to instruction 8. The next address is taken from
the top of the stack until the count reaches zero; then the next address comes from the pipeline
register. The above action continues as long as the test condition fails. If at any execution of
instruction 15 the test condition is passed, no branch is taken; the microprogram counter register
furnishes the next address. When the loop is ended, either by the count becoming zero, or by
passing the conditional test, the stack is POP’d by decrementing the stack pointer, since interest in
the value contained at the top of the stack is then complete.
As one example, consider the case of a memory search instruction. As shown in Figure II, the
instruction at microprogram address 63 can be Instruction 4 (PUSH), which will push the value 64
onto the microprogram stack and load the number N, which is one less than the number of
memory locations to be searched before giving up. Location 64 contains a microinstruction which
fetches the next operand from the memory area to be searched and compares it with the search
key. Location 65 contains a microinstruction which tests the result of the comparison and also is a
TWB for microprogram control. If no match is found, the test fails and the microprogram goes
back to location 64 for the next operand address. When the count becomes zero, the
microprogram branches to location 72, which does whatever is necessary if no match is found. If a
match occurs on any execution of the TWB at location 65, control falls through to location 66
which handles this case. Whether the instruction ends by finding a match or not, the stack will
have been POP’d once, removing the value 64 from the top of the stack.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IA2910A-CD40M | GT 85C 85#16 PIN RECP |
| IA2910A-CLC44M | Microprogram Controller |
| IA2910A-CLL44M | Microprogram Controller |
| IA2910A-PDW40C | Microprogram Controller |
| IA2910A-PDW40I | Microprogram Controller |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IA2910A_08 | 制造商:INNOVASIC 制造商全稱:INNOVASIC 功能描述:Microprogram Controller |
| IA2910A-CD40M | 制造商:INNOVASIC 制造商全稱:INNOVASIC 功能描述:Microprogram Controller |
| IA2910A-CLC44M | 制造商:INNOVASIC 制造商全稱:INNOVASIC 功能描述:Microprogram Controller |
| IA2910A-CLL44M | 制造商:INNOVASIC 制造商全稱:INNOVASIC 功能描述:Microprogram Controller |
| IA2910A-PDW40C | 制造商:INNOVASIC 制造商全稱:INNOVASIC 功能描述:Microprogram Controller |
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